| Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197) |
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| 03/21/2001 | EP1085420A1 Data processing device, data processing method, terminal, transmission method for data processing device |
| 03/21/2001 | EP0715760B1 Electronic label with optical reading/writing |
| 03/21/2001 | CN1288234A Recording/reproducing device and recording/reproducing method |
| 03/21/2001 | CN1063571C Recording method and apparatus of audio signal using integrated circuit memory card |
| 03/20/2001 | WO2001022419A1 Mobile karaoke system, method for ensuring electromagnetic compatibility of said karaoke system, mobile wireless transmitter for said system, method for preventing the use of unauthorized cartridges and restraining unauthorized access to said system |
| 03/20/2001 | US6205523 Memory access with plural memories written with the same data |
| 03/20/2001 | US6205514 Synchronous SRAM having global write enable |
| 03/20/2001 | US6205512 Set of two memories on the same monolithic integrated circuit |
| 03/20/2001 | US6205419 Selective recall and preservation of continuously recorded data |
| 03/20/2001 | US6205086 Phase control circuit, semiconductor device and semiconductor memory |
| 03/20/2001 | US6205085 Method and circuit for sending a signal in a semiconductor device during a setup time |
| 03/20/2001 | US6205084 Burst mode flash memory |
| 03/20/2001 | US6205083 Delayed locked loop implementation in a synchronous dynamic random access memory |
| 03/20/2001 | US6205082 LSI device with memory and logics mounted thereon |
| 03/20/2001 | US6205081 Address generating circuit of semiconductor memory device |
| 03/20/2001 | US6205080 Column decode circuits and apparatus |
| 03/20/2001 | US6205078 Method and apparatus for translating signals |
| 03/20/2001 | US6205076 Destructive read type memory circuit, restoring circuit for the same and sense amplifier |
| 03/20/2001 | US6205075 Semiconductor memory device capable of reducing the effect of crosstalk noise between main bit lines and virtual main grounding lines |
| 03/20/2001 | US6205073 Current conveyor and method for readout of MTJ memories |
| 03/20/2001 | US6205072 High-speed sense amplifier of a semi-conductor memory device |
| 03/20/2001 | US6205071 Semiconductor memory device including sense amplifier circuit differing in drivability between data write mode and data read mode |
| 03/20/2001 | US6205070 Current sense amplifier |
| 03/20/2001 | US6205069 Semiconductor memory device with fast input/output line precharge scheme and method of precharging input/output lines thereof |
| 03/20/2001 | US6205068 Dynamic random access memory device having a divided precharge control scheme |
| 03/20/2001 | US6205066 Dram array with gridded sense amplifier power source for enhanced column repair |
| 03/20/2001 | US6205062 CAS latency control circuit |
| 03/20/2001 | US6205061 Efficient back bias (VBB) detection and control scheme for low voltage drams |
| 03/20/2001 | US6205058 Data input/output circuit for performing high speed memory data read operation |
| 03/20/2001 | US6205046 Synchronous dynamic random-access memory |
| 03/20/2001 | US6205044 Decoder connection configuration for memory chips with long bit lines |
| 03/20/2001 | US6204698 Robust low voltage swing sense amplifier |
| 03/20/2001 | CA2195836C Semiconductor memory having main word line and subword lines provided correspondingly to the main word line |
| 03/15/2001 | WO2001018815A1 Self-erasing memory cell |
| 03/15/2001 | WO2001018814A1 Pseudo-differential current sense amplifier with hysteresis |
| 03/15/2001 | WO2001018813A1 Synchronous memory control circuit |
| 03/15/2001 | WO2001018640A1 Organization of blocks within a nonvolatile memory unit to effectively decrease sector write operation time |
| 03/15/2001 | DE19942437A1 Selbstlöschende Speicherzelle Self-extinguishing memory cell |
| 03/15/2001 | DE10014112A1 Multi-bank semiconductor memory device circuit arrangement, has column decoder blocks arranged between adjacent pairs of memory banks in which at least one global E/A line pair extends to adjacent memory bank |
| 03/14/2001 | EP1083571A1 Semiconductor device with decreased power consumption |
| 03/14/2001 | EP1083570A1 Method for clearing memory contents and memory array capable of performing the same |
| 03/14/2001 | EP1083474A2 Terminal apparatus and recording method |
| 03/14/2001 | EP0978123A4 Voltage sense amplifier and methods for implementing the same |
| 03/14/2001 | CN1287363A Semiconductor storage capable of increasing fetching speed of storage unit |
| 03/14/2001 | CN1287361A Real-time processing method for flash storage |
| 03/13/2001 | US6202139 Pipelined data cache with multiple ports and processor with load/store unit selecting only load or store operations for concurrent processing |
| 03/13/2001 | US6202119 Method and system for processing pipelined memory commands |
| 03/13/2001 | US6201760 Apparatus and method for performing data read operation in DDR SDRAM |
| 03/13/2001 | US6201757 Self-timed memory reset circuitry |
| 03/13/2001 | US6201756 Semiconductor memory device and write data masking method thereof |
| 03/13/2001 | US6201752 Timing circuit for high voltage testing |
| 03/13/2001 | US6201751 Integrated circuit power-up controllers, integrated circuit power-up circuits, and integrated circuit power-up methods |
| 03/13/2001 | US6201749 Semiconductor memory |
| 03/13/2001 | US6201748 Semiconductor memory device having test mode |
| 03/13/2001 | US6201743 Semiconductor device having delay circuit for receiving read instruction signal |
| 03/13/2001 | US6201740 Cache memories using DRAM cells with high-speed data path |
| 03/13/2001 | US6201730 Sensing of memory cell via a plateline |
| 03/13/2001 | US6201729 DRAM hidden row access method and apparatus |
| 03/13/2001 | US6201728 Dynamic RAM, semiconductor storage device, and semiconductor integrated circuit device |
| 03/13/2001 | US6201724 Semiconductor memory having improved register array access speed |
| 03/13/2001 | US6201423 Semiconductor device, semiconductor system, and digital delay circuit |
| 03/08/2001 | WO2001016961A1 Electric/electronic circuit device |
| 03/08/2001 | WO2001016958A1 Double data rate scheme for data output |
| 03/08/2001 | WO2001016957A1 Apparatus for analogue information transfer |
| 03/08/2001 | WO2001016954A1 Pipeline structure of memory for high-fast row-cycle |
| 03/08/2001 | DE19934500A1 Synchronous memory device |
| 03/08/2001 | DE10023248A1 Schaltung und Verfahren zur Taktsignalsynchronisation und Zeit/Digital-Wandler hierfür Circuit and method for clock signal synchronization and time A / D converter for this purpose |
| 03/08/2001 | CA2382715A1 Electric/electronic circuit device |
| 03/07/2001 | EP1081715A1 Logic-merged memory |
| 03/07/2001 | EP1081714A1 DRAM for storing data in pairs of cells |
| 03/07/2001 | EP1081712A1 Serial access memory having data registers shared in units of a plurality of columns |
| 03/07/2001 | EP1081711A2 Dynamic type memory |
| 03/07/2001 | EP1081710A1 Semiconductor memory apparatus which can make read speed of memory cell faster |
| 03/07/2001 | EP1081577A2 Reproducing information |
| 03/07/2001 | CN1286565A Editing apparatus, editing method and non-volatile memory |
| 03/06/2001 | US6199138 Controlling a paging policy based on a requestor characteristic |
| 03/06/2001 | US6199120 IC card reading/writing apparatus and method for allowing use of multiple vendors |
| 03/06/2001 | US6198702 Information providing and collecting apparatus and recording medium |
| 03/06/2001 | US6198690 Clock control circuit with an input stop circuit |
| 03/06/2001 | US6198689 Integrated circuit device with built-in self timing control circuit |
| 03/06/2001 | US6198688 Interface for synchronous semiconductor memories |
| 03/06/2001 | US6198682 Hierarchical dynamic memory array architecture using read amplifiers separate from bit line sense amplifiers |
| 03/06/2001 | US6198681 Sense amplifier for low voltage memory arrays |
| 03/06/2001 | US6198680 Circuit for resetting a pair of data buses of a semiconductor memory device |
| 03/06/2001 | US6198679 Semiconductor memory device |
| 03/06/2001 | US6198678 Semiconductor memories |
| 03/06/2001 | US6198677 Boosted sensing ground circuit |
| 03/06/2001 | US6198676 Test device |
| 03/06/2001 | US6198674 Data strobe signal generator of semiconductor device using toggled pull-up and pull-down signals |
| 03/06/2001 | US6198668 Memory cell array for performing a comparison |
| 03/06/2001 | US6198667 Plural memory banks device that can simultaneously read from or write to all of the memory banks during testing |
| 03/06/2001 | US6198666 Control input timing-independent dynamic multiplexer circuit |
| 03/06/2001 | US6198665 One chip semiconductor integrated circuit device having two modes of data write operation and bits setting operation |
| 03/06/2001 | US6198648 Semiconductor memory device with hierarchical bit line architecture |
| 03/06/2001 | US6197643 Method for making level converting circuit, internal potential generating circuit and internal potential generating unit |
| 03/01/2001 | WO2000074060B1 Semiconductor memory card, playback apparatus, recording apparatus, playback method, recording method, and computer-readable recording medium |
| 03/01/2001 | DE19935444A1 Data memory operating method |
| 03/01/2001 | DE10040809A1 Video or music playback device with an interface for insertion of a memory card that enables copyrighted or not copyrighted material to be played on the device, but that will not work with an incorrect memory card |
| 03/01/2001 | DE10040808A1 Terminal with memory cards for recoding data determines if inserted card maintains copyright and records compressed signal accordingly |
| 03/01/2001 | DE10040404A1 Data recording/playback device e.g. for foreign language teaching, has operating device used for entering pause information used for inserting pauses of defined duration in recorded information during playback |