| Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197) |
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| 03/01/2001 | DE10036446A1 Memory address generator for transposition memory used in mobile station for coded image data transmission uses e.g. barrel shifter to create column addresses |
| 03/01/2001 | DE10035690A1 Semiconductor memory device has input/output mode set by shifting levels of signals received at contacts of mode setting circuit |
| 03/01/2001 | DE10029887A1 Synchrone Halbleiterspeichervorrichtung The synchronous semiconductor memory device |
| 02/28/2001 | EP1079393A2 Editing apparatus, editing methods, and non-volatile memories |
| 02/28/2001 | EP1079392A2 System for recording and reproducing digital audio signals, for use in a car |
| 02/28/2001 | EP1079372A1 Recording device, recording method, reproducing device and reproducing method |
| 02/28/2001 | EP1078371A1 Circuit with a sensor and non-volatile memory |
| 02/28/2001 | EP1078370A1 Sense amplifier with zero power idle mode |
| 02/28/2001 | CN1285593A 终端设备 Terminal Equipment |
| 02/28/2001 | CN1285564A Terminal device |
| 02/28/2001 | CN1062668C FIFO buffer system having an error detection and correction device |
| 02/27/2001 | US6195762 Circuit and method for masking a dormant memory cell |
| 02/27/2001 | US6195674 Fast DCT apparatus |
| 02/27/2001 | US6195377 Embedded input logic in a high input impedance strobed CMOS differential sense amplifier |
| 02/27/2001 | US6195309 Timing circuit for a burst-mode address counter |
| 02/27/2001 | US6195306 Semiconductor device |
| 02/27/2001 | US6195302 Dual slope sense clock generator |
| 02/27/2001 | US6195301 Feedback driver for memory array bitline |
| 02/27/2001 | US6195298 Semiconductor integrated circuit capable of rapidly rewriting data into memory cells |
| 02/27/2001 | US6195297 Semiconductor memory device having pull-down function for non-selected bit lines |
| 02/27/2001 | US6195296 Semiconductor memory device and system |
| 02/27/2001 | US6195294 Semiconductor device |
| 02/27/2001 | US6195286 Circuit and method for reading a non-volatile memory |
| 02/27/2001 | US6195282 Wide database architecture |
| 02/27/2001 | US6195280 Memory system having a unidirectional bus and method for communicating therewith |
| 02/27/2001 | US6194932 Integrated circuit device |
| 02/27/2001 | US6194919 Main amplifier |
| 02/22/2001 | WO2001012862A2 Compositions and methods for preparing oligonucleotide solutions |
| 02/22/2001 | DE19936676A1 Interpolating memory circuit arrangement e.g. for computer graphics |
| 02/22/2001 | DE19935788A1 Optimised bus system hierarchy for connection of system-on-chip components |
| 02/22/2001 | DE10027097A1 Halbleiterspeichervorrichtung und eine solche Halbleiterspeichervorrichtung verwendender Sensor A semiconductor memory device, and such a semiconductor memory device using measuring sensor |
| 02/21/2001 | CN1284725A Card-shape semiconductor memory and its manufacturing, operating and setting method |
| 02/21/2001 | CN1062375C Apparatus for reproducing multiple sound using semiconductor memory card and method thereof |
| 02/20/2001 | USRE37060 Apparatus for serial reading and writing of random access memory arrays |
| 02/20/2001 | US6192447 Method and apparatus for resetting a random access memory |
| 02/20/2001 | US6192446 Memory device with command buffer |
| 02/20/2001 | US6192429 Memory device having a controller capable of disabling data input/output mask (DQM) input buffer during portions of a read operation and a write operation |
| 02/20/2001 | US6192005 Clock control signal and output enable signal generator in semiconductor memory device |
| 02/20/2001 | US6192004 Semiconductor integrated circuit |
| 02/20/2001 | US6192002 Memory device with command buffer |
| 02/20/2001 | US6191998 Programmable logic device memory array circuit having combinable single-port memory arrays |
| 02/20/2001 | US6191993 First in first out memory circuit |
| 02/20/2001 | US6191992 First-in-first-out storage device including synchronized full-state detention and empty-state detention |
| 02/20/2001 | US6191991 Data rate converter |
| 02/20/2001 | US6191990 Semiconductor integrated circuit device having stabilizing capacitors connected between power lines of main amplifiers |
| 02/20/2001 | US6191989 Current sensing amplifier |
| 02/20/2001 | US6191988 Floating bitline timer allowing a shared equalizer DRAM sense amplifier |
| 02/20/2001 | US6191986 Memory device with redundancy arrays |
| 02/20/2001 | US6191981 Sense amp control circuit |
| 02/20/2001 | US6191620 Sense amplifier/comparator circuit and data comparison method |
| 02/20/2001 | US6191617 Input buffer |
| 02/15/2001 | WO2001011629A1 Multiple data rate memory |
| 02/15/2001 | WO2001011628A1 Comparators, memory devices, comparison methods and memory reading methods |
| 02/15/2001 | DE10024297A1 Semiconducting memory device has replacement word lines with minimum distance between replacement word lines greater than minimum distance between normal word lines |
| 02/13/2001 | US6188641 Synchronous semiconductor memory device having input circuit with reduced power consumption |
| 02/13/2001 | US6188640 Data output circuits for semiconductor memory devices |
| 02/13/2001 | US6188639 Synchronous semiconductor memory |
| 02/13/2001 | US6188638 Integrated semiconductor memory with control device for clock-synchronous writing and reading |
| 02/13/2001 | US6188637 Semiconductor memory device allowing reduction in power consumption during standby |
| 02/13/2001 | US6188636 Circuit configuration for data storage |
| 02/13/2001 | US6188635 Process of synchronously writing data to a dynamic random access memory array |
| 02/13/2001 | US6188632 Dual access memory array |
| 02/13/2001 | US6188630 Semiconductor memory device |
| 02/13/2001 | US6188628 Semiconductor storage device |
| 02/13/2001 | US6188627 Method and system for improving DRAM subsystem performance using burst refresh control |
| 02/13/2001 | US6188623 Voltage differential sensing circuit and methods of using same |
| 02/13/2001 | US6188622 Method of identifying a defect within a memory circuit |
| 02/13/2001 | US6188618 Semiconductor device with flexible redundancy system |
| 02/13/2001 | US6188616 Semiconductor memory device having a compensating write pulse width in response to power supply voltage |
| 02/13/2001 | US6188615 MRAM device including digital sense amplifiers |
| 02/13/2001 | US6188612 Semiconductor memory |
| 02/13/2001 | US6188605 Non-volatile semiconductor memory using split bit lines |
| 02/13/2001 | US6188601 Ferroelectric memory device having single bit line coupled to at least one memory cell |
| 02/13/2001 | US6188598 Reducing impact of coupling noise |
| 02/13/2001 | US6188596 Layout for semiconductor memory including multi-level sensing |
| 02/08/2001 | WO2001009901A1 Semiconductor integrated device and electronic apparatus mounted with the device |
| 02/08/2001 | WO2001009871A1 Active matrix array devices with reduced non uniformities across multiplexed electrode groups |
| 02/08/2001 | WO2001009710A1 Method and device for writing and reading a buffer memory |
| 02/08/2001 | DE10035108A1 Non-volatile ferroelectric memory has cell arrays in matrix with number of pulldown read amplifiers formed between cell arrays and pullup read amplifier |
| 02/08/2001 | DE10034290A1 Reference level generator for application in non-volatile ferroelectric memory, includes operational control circuit for controlling the operation of reference bit-line level and feedback reference levels amplifiers |
| 02/08/2001 | DE10029335A1 Synchronous data scanning circuit for sequential data input, has data units scanned at the edge of the first pulsed signal generated during a clock-pulse interval at a low logic |
| 02/08/2001 | DE10022770A1 Integrated circuit current read-amplifier design, has output voltage level control circuit provided with first and second resistors and NMOS transistor connected to their point |
| 02/07/2001 | EP1074991A2 Semiconductor memory device |
| 02/07/2001 | EP1074906A1 Card-shaped semiconductor storage device and operation setting method of the same |
| 02/07/2001 | EP1074023A2 Method for writing and reading digital information values |
| 02/07/2001 | EP1073956A1 Apparatus with context switching capability |
| 02/07/2001 | CN1282962A RDRAM module connecting device |
| 02/07/2001 | CN1282918A Memory address producing device, moving station and data read/write method |
| 02/06/2001 | US6185712 Chip performance optimization with self programmed built in self test |
| 02/06/2001 | US6185664 Method for providing additional latency for synchronously accessed memory |
| 02/06/2001 | US6185656 Synchronous SRAM having pipelined enable and burst address generation |
| 02/06/2001 | US6185644 Memory system including a plurality of memory devices and a transceiver device |
| 02/06/2001 | US6185256 Signal transmission system using PRD method, receiver circuit for use in the signal transmission system, and semiconductor memory device to which the signal transmission system is applied |
| 02/06/2001 | US6185151 Synchronous memory device with programmable write cycle and data write method using the same |
| 02/06/2001 | US6185150 Clock-synchronous system |
| 02/06/2001 | US6185149 Semiconductor integrated circuit memory |
| 02/06/2001 | US6185145 Method and apparatus for translating signals |
| 02/06/2001 | US6185142 Apparatus for a semiconductor memory with independent reference voltage |
| 02/06/2001 | US6185141 Semiconductor device allowing efficient evaluation of fast operation |
| 02/06/2001 | US6185140 Sensing architecture with decreased precharge voltage levels |