| Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197) |
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| 05/31/2000 | EP1004956A2 Integrated I/O circuit using a high performance bus interface |
| 05/31/2000 | DE19956465A1 Control circuit for data I/O buffer has control unit that controls I/O buffer so that data input buffer is deactivated in read mode and data output buffer is activated |
| 05/31/2000 | CN1254990A Improved delay lockloop |
| 05/31/2000 | CN1254877A Portable MP3 player with multiple functions |
| 05/30/2000 | US6070262 Reconfigurable I/O DRAM |
| 05/30/2000 | US6070222 Synchronous memory device having identification register |
| 05/30/2000 | US6069839 Circuit and method for implementing single-cycle read/write operation(s), and random access memory including the circuit and/or practicing the method |
| 05/30/2000 | US6069834 Semiconductor IC device having a memory and a logic circuit implemented with a single chip |
| 05/30/2000 | US6069831 Semiconductor read-only memory with selection circuitry for routing dummy memory cell data to memory cell main bit lines |
| 05/30/2000 | US6069828 Semiconductor memory device having voltage booster circuit |
| 05/30/2000 | US6069815 Semiconductor memory having hierarchical bit line and/or word line architecture |
| 05/30/2000 | US6069813 System with meshed power and signal buses on cell array |
| 05/30/2000 | US6069639 Video camera system and semiconductor image memory circuit applied to it |
| 05/30/2000 | US6069504 Adjustable output driver circuit having parallel pull-up and pull-down elements |
| 05/30/2000 | US6069498 Clock generator for CMOS circuits with dynamic registers |
| 05/25/2000 | WO2000030117A1 Method and apparatus for commercial distribution and performance of recorded music |
| 05/25/2000 | DE19953323A1 Column address strobe (CAS) delay control circuit for SDRAM; has several main amplifiers for each of several banks and has data buses between banks |
| 05/25/2000 | DE19950767A1 Semiconductor memory component; has current control circuit for output driver and two voltage transmitting buffers |
| 05/25/2000 | DE19850650A1 Verfahren zum Übertragen von Daten A method for transmitting data |
| 05/24/2000 | EP1003175A1 Recording and reproducing apparatus |
| 05/24/2000 | EP1002369A1 Synchronous clock generator including delay-locked loop |
| 05/24/2000 | EP0876708A4 An address transition detection circuit |
| 05/24/2000 | CN1052812C Semi-conductor storage device |
| 05/23/2000 | US6067632 Clock-synchronized memory device and the scheduler thereof |
| 05/23/2000 | US6067605 Bidirectional transfer type storage and method for controlling input and output of memory |
| 05/23/2000 | US6067597 Word configuration programmable semiconductor memory with multiple word configuration programming mode |
| 05/23/2000 | US6067592 System having a synchronous memory device |
| 05/23/2000 | US6067274 Semiconductor memory device having a burst mode |
| 05/23/2000 | US6067273 Semiconductor memory burst length count determination detector |
| 05/23/2000 | US6067272 Delayed locked loop implementation in a synchronous dynamic random access memory |
| 05/23/2000 | US6067271 Semiconductor memory device and a driving method of the same |
| 05/23/2000 | US6067270 Multi-bank memory devices having improved data transfer capability and methods of operating same |
| 05/23/2000 | US6067267 Four-way interleaved FIFO architecture with look ahead conditional decoder for PCI applications |
| 05/23/2000 | US6067265 Reference potential generator and a semiconductor memory device having the same |
| 05/23/2000 | US6067264 High speed semiconductor memory device |
| 05/23/2000 | US6067259 Method and device for repairing arrays with redundancy |
| 05/23/2000 | US6067258 Operation mode determining circuit for semiconductor memory device |
| 05/23/2000 | US6067256 Static semiconductor memory device operating at high speed under lower power supply voltage |
| 05/23/2000 | US6067255 Merged memory and logic (MML) integrated circuits including independent memory bank signals and methods |
| 05/23/2000 | US6067253 Nonvolatile semiconductor memory device capable of suppressing a variation of the bit line potential |
| 05/23/2000 | US6066870 Single digit line with cell contact interconnect |
| 05/18/2000 | DE19954564A1 Control circuit for column address strobe delay in SDRAM has control circuit unit for generating four control signals for controlling latches and data selector |
| 05/17/2000 | EP1001428A2 Digital audio recording and reproducing apparatus |
| 05/17/2000 | EP1001350A2 Memory interface |
| 05/17/2000 | CN1253361A Multi-language universal electronic guide and its application method |
| 05/16/2000 | US6065093 High bandwidth narrow I/O memory device with command stacking |
| 05/16/2000 | US6065092 Independent and cooperative multichannel memory architecture for use with master device |
| 05/16/2000 | US6064627 Synchronous semiconductor memory device |
| 05/16/2000 | US6064625 Semiconductor memory device having a short write time |
| 05/16/2000 | US6064624 Circuit and method for eliminating idle cycles in a memory device |
| 05/16/2000 | US6064622 Column select line control circuit for synchronous semiconductor memory device and associated methods |
| 05/16/2000 | US6064620 Multi-array memory device, and associated method, having shared decoder circuitry |
| 05/16/2000 | US6064619 Synchronous dynamic random access memory in a semiconductor memory device |
| 05/16/2000 | US6064616 Conditional restore for SRAM |
| 05/16/2000 | US6064613 Pre-sense amplifier with reduced output swing |
| 05/16/2000 | US6064612 Method and circuit for high speed differential data transmission |
| 05/16/2000 | US6064605 Semiconductor memory device and memory system |
| 05/16/2000 | US6064600 Methods and apparatus for reading memory device register data |
| 05/16/2000 | US6064593 Semiconductor integrated circuit device having an electrically erasable and programmable nonvolatile memory and a built-in processing unit |
| 05/16/2000 | US6064244 Phase-locked loop circuit permitting reduction of circuit size |
| 05/16/2000 | US6064110 Digital circuit with transistor geometry and channel stops providing camouflage against reverse engineering |
| 05/16/2000 | CA2176985C Smart tray for audio player |
| 05/16/2000 | CA2150580C Communication data receiver |
| 05/11/2000 | WO2000026916A1 Device and method in an integrated circuit (ic) module for buffering clocks and other input signals |
| 05/11/2000 | WO2000026793A1 System and method for accessing data from an external memory using dual read timing protocols |
| 05/11/2000 | DE19903198C1 Integrated semiconductor memory device e.g. DRAM |
| 05/10/2000 | EP0999495A2 Procedure for the transfer of data |
| 05/10/2000 | EP0864153B1 Device and method for programming high impedance states upon select input/output pads |
| 05/10/2000 | EP0781443B1 Memory device and data processing system with such a memory device |
| 05/09/2000 | US6061297 Semiconductor memory device |
| 05/09/2000 | US6061296 Multiple data clock activation with programmable delay for use in multiple CAS latency memory devices |
| 05/09/2000 | US6061294 Synchronous semiconductor memory device and method of controlling sensing process of synchronous dynamic RAM |
| 05/09/2000 | US6061293 Synchronous interface to a self-timed memory array |
| 05/09/2000 | US6061292 Method and circuit for triggering column select line for write operations |
| 05/09/2000 | US6061288 Semiconductor device |
| 05/09/2000 | US6061287 Semiconductor memory device |
| 05/09/2000 | US6061286 Memory device with reduced power dissipation |
| 05/09/2000 | US6061278 Semiconductor memory, data read method for semiconductor memory and data storage apparatus |
| 05/09/2000 | US6061275 Semiconductor integrated circuit device having clamp circuit for accelerating data transfer on data bus |
| 05/09/2000 | US6061273 Pre-charge step determining circuit of a generic bit line, particularly for non-volatile memories |
| 05/09/2000 | US6060928 Device for delaying clock signal |
| 05/09/2000 | US6060916 Operation controller for a semiconductor memory device |
| 05/09/2000 | US6059450 Edge transition detection circuitry for use with test mode operation of an integrated circuit memory device |
| 05/04/2000 | WO2000025431A1 Serial-to-parallel/parallel-to-serial conversion engine |
| 05/04/2000 | WO2000025317A1 Method and apparatus for increasing the time available for refresh for 1-t sram compatible devices |
| 05/04/2000 | WO2000025300A1 Reproducing apparatus and recording/reproducing apparatus |
| 05/03/2000 | EP0997911A1 Voltage clamping method and apparatus for dynamic random access memory devices |
| 05/03/2000 | EP0871956B1 Method and apparatus for a low power self-timed memory control system |
| 05/03/2000 | EP0847581B1 Expandable data width sam for a multiport ram |
| 05/03/2000 | EP0745256B1 Method of and device for writing and reading data items in a memory system |
| 05/03/2000 | CN1052093C Fifo buffer system having enhanced controllability |
| 05/02/2000 | US6058069 Protection circuit to ensure DRAM signal in write cycle |
| 05/02/2000 | US6058068 Write driver with locally generated reset pulse |
| 05/02/2000 | US6058067 Multi-bank semiconductor memory device having an output control circuit for controlling bit line pairs of each bank connected to data bus pairs |
| 05/02/2000 | US6058065 Memory in a data processing system having improved performance and method therefor |
| 05/02/2000 | US6058064 Semiconductor memory devices having shared data line contacts |
| 05/02/2000 | US6058063 Integrated circuit memory devices having reduced power consumption requirements during standby mode operation |
| 05/02/2000 | US6058061 Semiconductor circuit device with reduced power consumption in slow operation mode. |
| 05/02/2000 | US6058059 Sense/output circuit for a semiconductor memory device |
| 05/02/2000 | US6058058 Memory device with a sense amplifier |