Patents
Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197)
01/2001
01/09/2001US6172916 Semiconductor memory device having a large band width and allowing efficient execution of redundant repair
01/09/2001US6172537 Semiconductor device
01/09/2001US6172528 Charge sharing circuit for fanout buffer
01/09/2001US6172524 Data input buffer
01/04/2001DE10031575A1 Semiconductor memory element uses global databus lines for data transfer between memory block and input/output interface, data strobe lines and comparison reference voltage lines
01/03/2001CN1278659A Structure for pre-taking data and timing signals in integrated circuit and method thereof
01/03/2001CN1278646A Synchrnous semi-conductor storage
01/02/2001US6170066 Power-off recovery management for sector based flash media managers
01/02/2001US6170046 Accessing a memory system via a data or address bus that provides access to more than one part
01/02/2001US6170036 Semiconductor memory device and data transfer circuit for transferring data between a DRAM and a SRAM
01/02/2001US6170035 Dynamic random access memory (DRAM) having variable configuration for data processing system and corresponding expansion support for the interleaved-block configuration thereof
01/02/2001US6169704 Apparatus and method for generating a clock within a semiconductor device and devices and systems including same
01/02/2001US6169703 Method for controlling high speed digital electronic memory
01/02/2001US6169701 Semiconductor memory device using shared sense amplifier system
01/02/2001US6169698 Voltage generating circuit for semiconductor memory sense amplifier
01/02/2001US6169697 Memory device with sensing current-reducible memory cell array
01/02/2001US6169696 Method and apparatus for stress testing a semiconductor memory
01/02/2001US6169684 Semiconductor memory device
01/02/2001US6169617 Information card having optical communication interface sections at a plurality of its surfaces and read/write device for information card having separate interface unit
12/2000
12/28/2000DE19929174A1 Integrated circuit for synchronous graphic RAM
12/27/2000EP1062586A1 Circuit for powering down unused configuration bits to minimize power consumption
12/26/2000US6167528 Programmably timed storage element for integrated circuit input/output
12/26/2000US6167499 Memory space compression technique for a sequentially accessible memory
12/26/2000US6167495 Method and apparatus for detecting an initialization signal and a command packet error in packetized dynamic random access memories
12/26/2000US6167491 High performance digital electronic system architecture and memory circuit therefor
12/26/2000US6167487 Multi-port RAM having functionally identical ports
12/26/2000US6167484 Method and apparatus for leveraging history bits to optimize memory refresh performance
12/26/2000US6167338 Method for storing and retrieving data in a control system, in particular in a motor vehicle
12/26/2000US6166993 Synchronous semiconductor memory device
12/26/2000US6166992 Semiconductor device
12/26/2000US6166990 Clock reproduction circuit that can reproduce internal clock signal correctly in synchronization with external clock signal
12/26/2000US6166989 Clock synchronous type semiconductor memory device that can switch word configuration
12/26/2000US6166988 Semiconductor memory device using one common address bus line between address buffers and column predecoder
12/26/2000US6166987 Nonvolatile semiconductor memory device having row decoder
12/26/2000US6166986 Semiconductor memory device
12/26/2000US6166978 Semiconductor differential amplifier having a gain controlled by a memory transistor
12/26/2000US6166977 Address controlled sense amplifier overdrive timing for semiconductor memory device
12/26/2000US6166976 Multiple equilibration circuits for a single bit line
12/26/2000US6166974 Dynamic precharge redundant circuit for semiconductor memory device
12/26/2000US6166973 Memory device with multiple-bit data pre-fetch function
12/26/2000US6166971 Method of and apparatus for correctly transmitting signals at high speed without waveform distortion
12/26/2000US6166970 Priority determining apparatus using the least significant bit and CAS latency signal in DDR SDRAM device
12/26/2000US6166969 Method and apparatus for a level shifter for use in a semiconductor memory device
12/26/2000US6166966 Semiconductor memory device including data output circuit capable of high speed data output
12/26/2000US6166965 Semiconductor memory device having push-pull type output circuit formed by two N-channel MOS transistors
12/26/2000US6166964 Semiconductor memory and method of controlling data therefrom
12/26/2000US6166963 Dual port memory with synchronized read and write pointers
12/26/2000US6166953 Data line disturbance free memory block divided flash memory and microcomputer having flash memory therein
12/26/2000US6166942 Embedded DRAM architecture with local data drivers and programmable number of data read and data write lines
12/26/2000US6166673 Data acquisition system and method with a selectable sampling rate
12/26/2000US6166576 Method and apparatus for controlling timing of digital components
12/26/2000US6166406 Precharge circuit and semiconductor storage device
12/21/2000DE19925881A1 Integrated memory arrangement for DRAM
12/21/2000DE10021346A1 Semiconducting component has HF distortion correction device that recovers lost HF components of input data depending on restoration clock signals, outputs recovered input data
12/20/2000EP1061523A1 Semiconductor memory device and electronic apparatus
12/19/2000USRE36993 Dynamic random access memory device with the combined open/folded bit-line pair arrangement
12/19/2000US6163860 Layout for a semiconductor memory device having redundant elements
12/19/2000US6163832 Semiconductor memory device including plural blocks with a pipeline operation for carrying out operations in predetermined order
12/19/2000US6163508 Recording method having temporary buffering
12/19/2000US6163501 Synchronous semiconductor memory device
12/19/2000US6163500 Memory with combined synchronous burst and bus efficient functionality
12/19/2000US6163499 Programmable impedance output buffer drivers, semiconductor devices and static random access memories provided with a programmable impedance output port
12/19/2000US6163496 Semiconductor memory device having a common column decoder shared by plurality of banks
12/19/2000US6163490 Semiconductor memory remapping
12/19/2000US6163486 Output circuit of semiconductor memory device
12/19/2000US6163475 Bit line cross-over layout arrangement
12/19/2000US6163178 Impedance controlled output driver
12/19/2000US6163174 Digital buffer circuits
12/19/2000US6163172 Clock loss detector
12/19/2000US6161916 Memory expansion circuit for ink jet print head identification circuit
12/14/2000DE19926314A1 Adaptor for reproducing or recording audio signals using semiconductor memory module card in audio cassette recorder or player
12/13/2000EP1059637A2 Method for extending the bandwidth of analog recorded speech signals for a dictation apparatus
12/12/2000US6160755 Clock signal from an adjustable oscillator for an integrated circuit
12/12/2000US6160754 Synchronous memory device of a wave pipeline structure
12/12/2000US6160752 Semiconductor memory device
12/12/2000US6160748 Apparatus and method for maintaining bit line charge state during a read operation
12/12/2000US6160746 Semiconductor memory with auto-tracking bit line precharge scheme
12/12/2000US6160743 Self-timed data amplifier and method for an integrated circuit memory device
12/12/2000US6160742 Semiconductor memory device and data read method of device
12/12/2000US6160736 Memory circuit for changing boost ratio
12/12/2000US6160733 Low voltage and low power static random access memory (SRAM)
12/12/2000US6160732 Integrated circuit with a configuration assembly
12/12/2000US6160731 Memory device with skew-removable I/O structure
12/12/2000US6160426 Semiconductor memory device having clock frequency multiplying apparatus
12/12/2000US6160419 Programmable logic architecture incorporating a content addressable embedded array block
12/12/2000US6160411 Apparatus for testing an integrated circuit in an oven during burn-in
12/07/2000WO2000074063A1 Plateline sensing
12/07/2000WO2000074061A1 Semiconductor memory card, playback apparatus, recording apparatus, playback method, recording method, and a computer-readable storage medium
12/07/2000WO2000074060A1 Semiconductor memory card, playback apparatus, recording apparatus, playback method, recording method, and computer-readable recording medium
12/07/2000WO2000074059A1 A semiconductor memory card, playback apparatus, recording apparatus, playback method, recording method, and computer-readable recording medium
12/07/2000WO2000074058A1 Storage, storage method, and data processing system
12/07/2000WO2000074054A2 Semiconductor memory card, apparatus for recording data onto the semiconductor memory card, and apparatus for reproducing data of the semiconductor memory card
12/07/2000DE19924288A1 Integrated memory with global amplifiers, e.g. for SGRAM
12/07/2000DE19924244A1 Integrated memory with redundant units which can be tested
12/07/2000DE19908428C2 Halbleiterspeicheranordnung mit Bitleitungs-Twist A semiconductor memory device with bit line twist
12/07/2000CA2273665A1 Differential sensing amplifier for content addressable memory
12/06/2000EP1057186A1 A memory decoder with zero static power
12/06/2000EP1057185A1 Current sense amplifier
12/06/2000EP1057171A1 Audio recorder with retroactive storage
12/06/2000CN1275773A Recording medium, equipment, method, compiling equipment and method