| Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197) |
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| 08/09/2001 | US20010012233 Synchronous semiconductor memory device |
| 08/09/2001 | US20010012232 Semiconductor integrated circuit |
| 08/09/2001 | US20010012229 Semiconductor memory device |
| 08/09/2001 | US20010012227 Semiconductor memory device |
| 08/09/2001 | US20010012214 Semiconductor memory device |
| 08/09/2001 | US20010011916 Clock signal generator for an integrated circuit |
| 08/09/2001 | US20010011913 Apparatus and method for generating a clock within a semiconductor device and devices and systems including same |
| 08/09/2001 | US20010011735 Semiconductor memory device for decreasing a coupling capacitance |
| 08/09/2001 | DE10065477A1 Automatic pre-charge device of semiconductor storage arrangement, includes automatic pre-charge signal generator for reception of external control signals and then for generating an internal pre-charge command signal |
| 08/09/2001 | DE10004648A1 Integrated semiconductor memory e.g. dynamic semiconductor memory, has connection line which outputs control signal to precharging and memory circuits and read amplifier |
| 08/09/2001 | DE10004110A1 Read/write control method of synchronous memory, involves autoprecharging signal paths separately during reading and writing processes |
| 08/09/2001 | DE10004109A1 Memory module of electronic data processor, has switch connecting main and local data lines, arranged such that delay time of bit during synchronous memory access is made shorter |
| 08/09/2001 | DE10004108C1 Circuit for generating output clock signal with optimised signal generation time for memory arrangement eliminates certain problems related to transition times - has duty cycle equaliser with 2 coupled symmetrical branches contg. multiplexer integrated with programmable signal supply points producing output signal |
| 08/08/2001 | EP1122887A1 Pre-charging circuit of an output buffer |
| 08/08/2001 | EP1122740A1 Integrated semiconductor memory and method for clearing memory cells of an integrated semiconductor memory |
| 08/08/2001 | EP1122739A2 Accelerated carry generation. |
| 08/08/2001 | EP1122738A1 Circuit for generating an output clock signal with optimised signal generation time |
| 08/08/2001 | EP1122737A1 Circuit for managing the transfer of data streams from a plurality of sources within a system |
| 08/08/2001 | EP1122736A1 ATD generation in a synchronous memory |
| 08/08/2001 | EP1122735A1 Interleaved data path and output management architecture for an interleaved memory and load pulser circuit for outputting the read data |
| 08/08/2001 | EP1122734A1 Burst interleaved memory with burst mode access in synchronous read phases wherein the two sub-arrays are independently readable with random access during asynchronous read phases |
| 08/08/2001 | EP1122733A1 Internal regeneration of the address latch enable (ALE) signal of a protocol of management of a burst interleaved memory and relative circuit |
| 08/08/2001 | EP1122713A2 Memory consolidated image processing LSI, image processing system with same, and image accessing method using same |
| 08/08/2001 | EP1121759A1 Serial-to-parallel/parallel-to-serial conversion engine |
| 08/08/2001 | EP1086465A4 Method and apparatus for a serial access memory |
| 08/08/2001 | EP0892988B1 Integrated circuit protection device and method |
| 08/08/2001 | EP0824789B1 Clock generator for cmos circuits with dynamic registers |
| 08/08/2001 | CN1307281A Relative allocation device and method for data storage card |
| 08/07/2001 | USRE37316 Synchronous LSI memory device |
| 08/07/2001 | US6272608 Method and apparatus for synchronous data transfers in a memory device with lookahead logic for detecting latency intervals |
| 08/07/2001 | US6272583 Microprocessor having built-in DRAM and internal data transfer paths wider and faster than independent external transfer paths |
| 08/07/2001 | US6272577 Data processing system with master and slave devices and asymmetric signal swing bus |
| 08/07/2001 | US6272570 IC memory card |
| 08/07/2001 | US6272567 System for interposing a multi-port internally cached DRAM in a control path for temporarily storing multicast start of packet data until such can be passed |
| 08/07/2001 | US6272321 Method for tuning an oscillating receiver circuit of a transponder built into a RFID system |
| 08/07/2001 | US6272257 Decoder of variable length codes |
| 08/07/2001 | US6272070 Method and apparatus for setting write latency |
| 08/07/2001 | US6272069 LSI device with memory and logics mounted thereon |
| 08/07/2001 | US6272068 Integrated circuit memory devices that utilize data masking techniques to facilitate test mode analysis |
| 08/07/2001 | US6272067 SRAM synchronized with an optimized clock signal based on a delay and an external clock |
| 08/07/2001 | US6272066 Synchronous semiconductor memory device capable of high speed reading and writing |
| 08/07/2001 | US6272065 Address generating and decoding circuit for use in burst-type random access memory device having a double data rate, and an address generating method thereof |
| 08/07/2001 | US6272064 Memory with combined synchronous burst and bus efficient functionality |
| 08/07/2001 | US6272062 Semiconductor memory with programmable bitline multiplexers |
| 08/07/2001 | US6272060 Shift register clock scheme |
| 08/07/2001 | US6272059 Bit line sense-amplifier for a semiconductor memory device and a method for driving the same |
| 08/07/2001 | US6272058 Semiconductor memory device capable of performing data reading/writing in units of plurality of bits |
| 08/07/2001 | US6272056 Semiconductor memory device capable of implementing redundancy-based repair efficiently in relation to layout and operating speed and semiconductor integrated circuit device having such semiconductor memory device |
| 08/07/2001 | US6272055 Semiconductor memory device |
| 08/07/2001 | US6272054 Twin-cell memory architecture with shielded bitlines for embedded memory applications |
| 08/07/2001 | US6272053 Semiconductor device with common pin for address and data |
| 08/07/2001 | US6272035 Integrated memory |
| 08/07/2001 | US6271687 Sense amplifier circuit |
| 08/07/2001 | US6271682 Method and apparatus for high-speed edge-programmable timing signal generator |
| 08/07/2001 | CA2204089C Digital delay locked loop |
| 08/02/2001 | WO2001056036A1 Method and apparatus for three-dimensional storage of data |
| 08/02/2001 | WO2001056034A1 Chained array of sequential access memories enabling continuous read |
| 08/02/2001 | WO2001056028A1 A compressed digital audio playing apparatus equipped to output audibly or magnetically |
| 08/02/2001 | WO2001020611A3 Controlling burst sequence in synchronous memories |
| 08/02/2001 | US20010011353 Secure module with microprocessor and co-processor |
| 08/02/2001 | US20010011334 Memory device |
| 08/02/2001 | US20010011311 Data transfer control method, and peripheral circuit, data processor and data processing system for the method |
| 08/02/2001 | US20010011195 Recording and/or reproducing apparatus and recording apparatus |
| 08/02/2001 | US20010010663 Graphic data creating and editing system for digital audio player, digital audio player, method for creating and editing graphic data, storage medium and data signal |
| 08/02/2001 | US20010010654 Multiple ports memory-cell structure |
| 08/02/2001 | US20010010653 Semiconductor integrated circuit and method for adjusting characteristics of the same |
| 08/02/2001 | US20010010650 Semiconductor memory device having operation delay function of column address strobe command, and buffer and signal transmission circuit which are applied to the semiconductor memory device |
| 08/02/2001 | US20010010643 Semiconductor memory device |
| 08/02/2001 | US20010010640 Semiconductor memory device |
| 08/02/2001 | DE10102626A1 Signalübertragungsschaltung, Puffer und zugehöriges Halbleiterspeicherbauelement Signal transmission circuit, buffers and related semiconductor memory device |
| 08/02/2001 | DE10065785A1 Halbleiterspeichervorrichtung A semiconductor memory device |
| 08/02/2001 | DE10065476A1 Halbleiter-Speicheranordnung und Verfahren für deren Bit-Leitungsverbindung A semiconductor memory device and methods for their bit line connection |
| 08/02/2001 | DE10064537A1 Halbleiterspeichervorrichtung A semiconductor memory device |
| 08/02/2001 | DE10047176A1 Halbleiterspeicheranordnung, welche mit einer Erzeugungseinrichtung für ein internes Taktsignal für eine spezielle Betriebsart ausgestattet ist A semiconductor memory device, which is equipped with a device for generating an internal clock signal for a particular operating mode |
| 08/02/2001 | DE10002130A1 Verfahren und Vorrichtung zum wechselweisen Betreiben eines Schreib-Lese-Speichers im Ein-Speicher-Betriebsmodus und im verschränkten Mehr-Speicher-Betriebsmodus Method and apparatus for alternately operating a write-read memory in a storage mode of operation and in the interleaved multi-memory operating mode |
| 08/02/2001 | DE10002082A1 Schaltungsanordnung mit variabler Anzahl von Datenausgängen und Vorrichtung zum Auslesen von Daten aus einer Schaltungsanordnung mit variabler Anzahl von Datenausgängen Circuit arrangement with a variable number of data outputs and apparatus for reading data from a circuit arrangement with a variable number of data outputs |
| 08/01/2001 | EP1120906A2 Circuit for converting a pair of difference signals into a single-ended output signal |
| 08/01/2001 | EP1120708A2 Arrangement and method for signal processing and storage |
| 07/31/2001 | US6269462 Selectable sense amplifier delay circuit and method |
| 07/31/2001 | US6269434 Recording and reproducing apparatus including a nonvolatile memory which includes a first area for file management tables and a second area for data and a control unit |
| 07/31/2001 | US6269051 Semiconductor device and timing control circuit |
| 07/31/2001 | US6269050 Internal clock generating circuit of synchronous type semiconductor memory device and method thereof |
| 07/31/2001 | US6269048 Semiconductor memory device for inputting/outputting data through a common terminal and outputting data in synchronism with clock |
| 07/31/2001 | US6269047 Semiconductor memory device |
| 07/31/2001 | US6269044 Semiconductor memory device employing an abnormal current consumption detection scheme |
| 07/31/2001 | US6269041 Embedded auto-refresh circuit for pseudo static random access memory |
| 07/31/2001 | US6269040 Interconnection network for connecting memory cells to sense amplifiers |
| 07/31/2001 | US6269037 Variable equilibrate voltage circuit for paired digit lines |
| 07/31/2001 | US6269036 System and method for testing multiple port memory devices |
| 07/31/2001 | US6269030 Semiconductor memory device |
| 07/31/2001 | US6269029 Semi-conductor memory device |
| 07/31/2001 | US6269028 Method and apparatus for multistage readout operation |
| 07/31/2001 | US6269027 Non-volatile storage latch |
| 07/31/2001 | US6268748 Module with low leakage driver circuits and method of operation |
| 07/31/2001 | US6268747 Dynamic voltage sense amplifier |
| 07/31/2001 | US6268741 Semiconductor integrated circuits with power reduction mechanism |
| 07/26/2001 | WO2001054386A1 Method and system for remote audio recording onto an audio card |
| 07/26/2001 | WO2001054280A1 Programmable array logic circuit employing non-volatile ferromagnetic memory cells |
| 07/26/2001 | WO2001054132A1 System and method for displaying information on the screen of a user interface device under the control of a digital audio playback device |
| 07/26/2001 | WO2001054083A1 Microprocessor system with encoding |