Patents
Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197)
05/2006
05/31/2006EP1576610B1 Sense amplifier for a memory having at least two distinct resistance states
05/31/2006EP1485920B1 Increasing the read signal in ferroelectric memories
05/31/2006CN1779979A Semiconductor device and methods of arranging and manufacturing same
05/31/2006CN1779854A Memory device, memory controller and memory system having bidirectional clock lines
05/31/2006CN1779852A Memory chip internal power administrative framework in deep shutdown mode
05/31/2006CN1779850A Burglar proof car audio system capable of attaching and detaching portable MP3 player and control method thereof
05/31/2006CN1779849A Access device with power consumption decreasement and access method thereof
05/31/2006CN1779848A Storage device and semiconductor device
05/31/2006CN1779784A Sound recording method and device
05/31/2006CN1779658A Dynamic random access memory controller and video system
05/31/2006CN1258188C Method for controlling semiconductor device and semiconductor device
05/31/2006CN1258150C Semiconductor device
05/30/2006US7055087 Memory device for use in high-speed block pipelined Reed-Solomon decoder, method of accessing the memory device, and Reed-Solomon decoder having the memory device
05/30/2006US7055007 Data processor memory circuit
05/30/2006US7054992 Synchronous flash memory with non-volatile mode register
05/30/2006US7054805 Method and system for allocating memory during encoding of a datastream
05/30/2006US7054224 Non-synchronous semiconductor memory device having page mode read/write
05/30/2006US7054221 Data pass control device for masking write ringing in DDR SDRAM and method thereof
05/30/2006US7054220 Memory device having repeaters
05/30/2006US7054216 Programmable MOS device formed by hot carrier effect
05/30/2006US7054215 Multistage parallel-to-serial conversion of read data in memories, with the first serial bit skipping at least one stage
05/30/2006US7054214 Semiconductor device
05/30/2006US7054213 Method and circuit for determining sense amplifier sensitivity
05/30/2006US7054212 Sense amplifier with adaptive reference generation
05/30/2006US7054211 Semiconductor memory storage device capable of high operating speed
05/30/2006US7054210 Write/precharge flag signal generation circuit and circuit for driving bit line isolation circuit in sense amplifier using the same
05/30/2006US7054209 Semiconductor memory device and test method thereof
05/30/2006US7054208 Method and device for testing a sense amp
05/30/2006US7054207 Method and system for selecting redundant rows and columns of memory cells
05/30/2006US7054206 Sub-column-repair-circuit
05/30/2006US7054205 Circuit and method for determining integrated circuit propagation delay
05/30/2006US7054204 Semiconductor device and method for controlling the same
05/30/2006US7054203 High reliability memory element with improved delay time
05/30/2006US7054202 High burst rate write data paths for integrated circuit memory devices and methods of operating same
05/30/2006US7054201 Driving circuit for non-volatile DRAM
05/30/2006US7054200 Semiconductor device
05/30/2006US7054186 Magnetic random access memory
05/30/2006US7054184 Cache late select circuit
05/30/2006US7054180 Method and circuit for adjusting a resistance in an integrated circuit
05/30/2006US7054074 Objective lens and optical pickup apparatus, information recording/reproducing apparatus
05/30/2006US7053682 Device and method for clock generation
05/30/2006US7053679 Output driver for controlling slew rate in a semiconductor device
05/30/2006US7053668 SOI sense amplifier with cross-coupled body terminal
05/30/2006US7053442 Nonvolatile semiconductor memory device
05/30/2006CA2183355C Method of converting a series of m-bit information words to a modulated signal, method of producing a record carrier, coding device, decoding device, recording device, reading device, signal, as well as a record carrier
05/26/2006WO2006055717A2 Robust and high-speed memory access with adaptive interface timing
05/26/2006WO2006055497A2 Command controlling different operations in different chips
05/26/2006WO2006053756A1 Twin-cell bit line sensing configuration
05/26/2006WO2005119687A3 Automatic hidden refresh in a dram and method therefor
05/25/2006US20060112428 Device having a locking feature and a method, means and software for utilizing the feature
05/25/2006US20060112427 Enterprise-wide security system for computer devices
05/25/2006US20060112231 Synchronous DRAM with selectable internal prefetch size
05/25/2006US20060109728 Common-mode data transmission for power over Ethernet system
05/25/2006US20060109727 Integrated semiconductor memory device
05/25/2006US20060109725 Apparatus and method for managing bad blocks in a flash memory
05/25/2006US20060109723 Active termination circuit and method for controlling the impedance of external integrated circuit terminals
05/25/2006US20060109722 Active termination circuit and method for controlling the impedance of external integrated circuit terminals
05/25/2006US20060109721 Random access memory having fast column access
05/25/2006US20060109720 Writing driver circuit of phase-change memory
05/25/2006US20060109719 Charge pump for use in a semiconductor memory
05/24/2006EP1659592A1 Memory access method with error detection based on an error code indicating the number of bits of the same logical value of a data word, and corresponding apparatus
05/24/2006EP1659591A2 Semiconductor memory
05/24/2006EP1658618A2 Error detection and correction method and apparatus in a magneto-resistive random access memory
05/24/2006EP1658616A1 Semiconductor memory component and method for operating said component
05/24/2006EP1442462B1 Using transfer bits during data transfer from non-volatile to volatile memories
05/24/2006EP1433179B1 System and method for early write to memory by holding bitline at fixed potential
05/24/2006EP1153393B1 Improved word line boost circuit
05/24/2006DE102005052776A1 Tastverzerrungsdetektor Tastverzerrungsdetektor
05/24/2006DE102005043295A1 Fehlerdetektionsverfahren, Rückkopierprogrammierverfahren und NAND-Flashspeicherbauelement Error detection method, copy-back programming method and NAND-type flash memory device
05/24/2006DE102005038519A1 Taktgeneratorschaltung, Verzögerungsschaltung, Betriebsverfahren und Taktsignalerzeugungsverfahren Clock generator circuit, delay circuit, operating procedures and timing signal generating method
05/24/2006DE102005008516B3 Sense amplifier, has two field effect transistors possessing bulk or substrate connections that are formed in respective wells of substrate, where wells are electrically isolated from each other
05/24/2006DE102004055674A1 Memory cell device for writing/reading a memory cell in a semiconductor device has a selecting transistor and a storage capacitor
05/24/2006DE102004055046A1 Semiconductor storage/memory system e.g. for transmission of write and read data signals, has interface circuits set up for transmission of burst lengths of write data
05/24/2006DE10149098B4 Digitale Speicherschaltung mit mehreren segmentierten Speicherbereichen Digital memory circuit having a plurality of segmented memory areas
05/24/2006DE10040462B4 Verfahren und Vorrichtung zum Speichern und Ausgeben von Daten mit einem virtuellen Kanal Method and apparatus for storing and outputting data with a virtual channel
05/24/2006CN1777956A Simultaneous reading from and writing to different memory cells
05/24/2006CN1776823A Method of reading a flash memory device
05/24/2006CN1776821A Semiconductor memory device for low power system
05/24/2006CN1776820A Memory device capable of changing data output mode
05/24/2006CN1257510C Semiconductor memory with page copying function and its working method
05/23/2006US7051260 Data storing method of dynamic RAM and semiconductor memory device
05/23/2006US7051225 Memory system, module and register
05/23/2006US7051183 Circuit for recording digital waveform data and method of doing the same
05/23/2006US7051178 Burst write in a non-volatile memory device
05/23/2006US7051151 Integrated circuit buffer device
05/23/2006US7050354 Low-power compiler-programmable memory with fast access timing
05/23/2006US7050352 Data input apparatus of DDR SDRAM and method thereof
05/23/2006US7050351 Method and apparatus for multiple row caches per bank
05/23/2006US7050350 Field memory having a line memory in a memory cell array
05/23/2006US7050349 Semiconductor integrated circuit device and semiconductor memory device reprogrammable after assembly
05/23/2006US7050348 Process for controlling the read amplifiers of a memory and corresponding memory integrated circuit
05/23/2006US7050347 Semiconductor memory
05/23/2006US7050346 Non-volatile semiconductor memory device and electric device with the same
05/23/2006US7050345 Memory device and method with improved power and noise characteristics
05/23/2006US7050344 Failure test method for split gate flash memory
05/23/2006US7050341 Diagonal matrix delay
05/23/2006US7050340 Semiconductor memory system and method for the transfer of write and read data signals in a semiconductor memory system
05/23/2006US7050339 Semiconductor device having switch circuit to supply voltage
05/23/2006US7050337 Writing control method and writing control system of semiconductor storage device, and portable electronic apparatus
05/23/2006US7050325 Magnetic random access memory