Patents
Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197)
07/2006
07/13/2006DE102005056350A1 Integrierte DRAM-Speichervorrichtung DRAM integrated memory device
07/13/2006DE102005000841A1 Integrierter Halbleiterspeicher mit Anpassung des Bewertungsverhaltens von Leseverstärkern Integrated semiconductor memory with adjustment of the evaluation behavior of sense amplifiers
07/13/2006DE102004062282A1 Data memory uses a delay locked loop to provide reliable data transmission in an unstable environment having such as temperature swings
07/13/2006DE10014362B4 Vorrichtung zur Wiedergabe von Informationen An apparatus for reproducing information
07/12/2006EP1679607A2 A memory controller with an adaptive timing system for controlling access to the memory
07/12/2006EP1678721A1 Memory assembly and method for operating the same
07/12/2006EP1678720A1 Multiple data rate bus using return clock
07/12/2006EP1678621A2 Method and apparatus for sending data from multiple sources over a communications bus
07/12/2006EP1364372B1 Non-destructive readout
07/12/2006EP1093126B1 Integrated circuit
07/12/2006CN1802707A An apparatus and method for a configurable mirror fast sense amplifier
07/12/2006CN1801625A Delay locked loop and semiconductor memory device having the same
07/12/2006CN1801398A Sram device
07/12/2006CN1801395A Method for repairing and running storage devices
07/12/2006CN1801393A Time limit function utilization apparatus
07/12/2006CN1801389A High performance register file with bootstrapped storage supply and related method
07/12/2006CN1801388A 半导体存储装置 The semiconductor memory device
07/12/2006CN1801118A 存储装置 Storage device
07/12/2006CN1264220C Strong dielectric memory device and its producing method
07/12/2006CN1264219C Synchronous semiconductor memory device
07/12/2006CN1264168C Apparatus and method for processing data
07/12/2006CN1264167C Semiconductor storage apparatus
07/12/2006CN1264166C Non-synchronous first in first out controller using biedge sampling processing control signal
07/12/2006CN1264100C PC flash storing disc system structure based on universal serial bus
07/11/2006US7076702 Memory with element redundancy
07/11/2006US7076686 Hot swapping memory method and system
07/11/2006US7076678 Method and apparatus for data transfer
07/11/2006US7076677 Same edge strobing for source synchronous bus systems
07/11/2006US7076631 Mechanism for on-the-fly handling of unaligned memory accesses
07/11/2006US7076610 FIFO memory devices having multi-port cache memory arrays therein that support hidden EDC latency and bus matching and methods of operating same
07/11/2006US7076601 Memory controller and data processing system
07/11/2006US7076600 Dual purpose interface using refresh cycle
07/11/2006US7076013 Clock synchronization device
07/11/2006US7075857 Distributed write data drivers for burst access memories
07/11/2006US7075856 Apparatus for latency specific duty cycle correction
07/11/2006US7075854 Semiconductor memory device, write control circuit and write control method for the same
07/11/2006US7075853 Semiconductor memory device including internal clock doubler
07/11/2006US7075851 Semiconductor memory device inputting/outputting data and parity data in burst operation
07/11/2006US7075850 Compact decode and multiplexing circuitry for a multi-port memory having a common memory interface
07/11/2006US7075849 Semiconductor memory device and layout method thereof
07/11/2006US7075848 Redundancy circuit in semiconductor memory device having a multiblock structure
07/11/2006US7075847 Semiconductor memory device having optimum refresh cycle according to temperature variation
07/11/2006US7075846 Apparatus for interleave and method thereof
07/11/2006US7075845 FeRAM and sense amplifier array having data bus pull-down sensing function and sensing method using the same
07/11/2006US7075844 Parallel sense amplifier with mirroring of the current to be measured into each reference branch
07/11/2006US7075843 Sense amplifier for mask read only memory
07/11/2006US7075842 Differential current-mode sensing methods and apparatuses for memories
07/11/2006US7075841 Writing circuit for a phase change memory device
07/11/2006US7075840 Low impedance memory bitline eliminating precharge
07/11/2006US7075839 Semiconductor memory device
07/11/2006US7075837 Redundancy relieving circuit
07/11/2006US7075836 Semiconductor memory having testable redundant memory cells
07/11/2006US7075835 Redundancy control circuit which surely programs program elements and semiconductor memory using the same
07/11/2006US7075834 Semiconductor integrated circuit device
07/11/2006US7075833 Circuit for detecting negative word line voltage
07/11/2006US7075825 Electrically alterable non-volatile memory with n-bits per cell
07/11/2006US7075821 Apparatus and method for a one-phase write to a one-transistor memory cell array
07/11/2006US7075820 Semiconductor memory device for dynamically storing data with channel body of transistor used as storage node
07/11/2006US7075813 Storage device using resistance varying storage element and reference resistance value decision method for the device
07/11/2006US7075808 Method for bus capacitance reduction
07/11/2006US7075469 Semiconductor integrated circuit
07/06/2006WO2006071684A2 Sense amplifiers with high voltage swing
07/06/2006WO2006071402A1 System for performing fast testing during flash reference cell setting
07/06/2006WO2006058200A3 Micro-threaded memory
07/06/2006WO2006012137A3 Reduced area, reduced programming voltage cmos efuse-based scannable non-volatile memory bitcell
07/06/2006US20060148130 Memory chip and semiconductor device using the memory chip and manufacturing method of those
07/06/2006US20060146641 High speed DRAM architecture with uniform access latency
07/06/2006US20060146636 Internal power management scheme for a memory chip in deep power down mode
07/06/2006US20060146632 Flash memory device and method for fabricating the same, and programming and erasing method thereof
07/06/2006US20060146631 Self refresh oscillator and oscillation signal generation method of the same
07/06/2006US20060146630 Non volatile semiconductor memory device having a multi-bit cell array
07/06/2006US20060146629 Semiconductor memory, semiconductor memory system and method of monitoring dynamic temperature thereof
07/06/2006US20060146628 Control circuit for refresh oscillator
07/06/2006US20060146627 Memory system having multi-terminated multi-drop bus
07/06/2006US20060146626 Refresh control circuit of pseudo SRAM
07/06/2006US20060146625 Semiconductor memory
07/06/2006US20060146624 Current folding sense amplifier
07/06/2006US20060146623 Semiconductor device
07/06/2006US20060146621 Difference signal path test and characterization circuit
07/06/2006US20060146619 Semiconductor memory device and method for controlling the same
07/06/2006US20060146618 Circuit and method for generating boosted voltage in semiconductor memory device
07/06/2006US20060146617 Programming and evaluating through PMOS injection
07/06/2006US20060146610 Nonvolatile semiconductor memory having plural data storage portions for a bit line connected to memory cells
07/06/2006US20060146609 NAND flash memory device and method of programming same
07/06/2006US20060146596 Configurable storage device
07/06/2006US20060146587 Method for eliminating crosstalk in a metal programmable read only memory
07/06/2006US20060145907 Semiconductor integrated circuit
07/06/2006DE10330812B4 Halbleiterspeichermodul A semiconductor memory module
07/06/2006DE102005059780A1 Halbleiterspeicher, Halbleiterspeichersystem und Verfahren zum Überwachen einer dynamischen Temperatur derselben A semiconductor memory, semiconductor memory system and method for monitoring a dynamic temperature thereof
07/06/2006DE102005053717A1 Erfass-Verstärker-Bitleitungs-Verstärkungs-Schaltkreis Sense amplifier bit line boost circuit
07/06/2006DE102005051943A1 Integrierte Speichervorrichtung und Speichermodul Integrated memory device and memory module
07/06/2006DE102005051478A1 Flashdatenspeichervorrichtung Flash data storage device
07/06/2006DE102005010906A1 Clock signal generation apparatus for use in semiconductor memory device, has clock signal generation unit for receiving internal clock signal to generate reference clock signal when control signal is activated
07/06/2006DE10018988B4 Hochgeschwindigkeits-Pipelinevorrichtung und Verfahren zum Erzeugen von Steuersignalen dafür High-speed pipelined device and method for generating control signals for
07/05/2006EP1677310A1 Semiconductor memory device and storage method thereof
07/05/2006EP1677309A2 Memory device
07/05/2006EP1677204A2 A memory and an adaptive timing system for controlling access to the memory
07/05/2006EP1573493A4 Method for identification of spi compatible serial memory devices
07/05/2006EP1428220B1 Dynamic column block selection
07/05/2006CN1797604A Calibration circuit of a semiconductor memory device and method of operation the same