| Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197) |
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| 03/21/2006 | US7016259 Apparatus for calibrating the relative phase of two reception signals of a memory chip |
| 03/21/2006 | US7016258 Semiconductor device having input/output sense amplifier for multiple sampling |
| 03/21/2006 | US7016257 Semiconductor memory device capable of generating variable clock signals according to modes of operation |
| 03/21/2006 | US7016256 Data input unit of synchronous semiconductor memory device, and data input method using the same |
| 03/21/2006 | US7016255 Multi-port memory device |
| 03/21/2006 | US7016252 High speed low voltage driver |
| 03/21/2006 | US7016251 Method and apparatus for initializing SRAM device during power-up |
| 03/21/2006 | US7016250 Voltage regulator and data path for a memory device |
| 03/21/2006 | US7016248 Method and apparatus for controlling a high voltage generator in a wafer burn-in test |
| 03/21/2006 | US7016247 Semiconductor memory apparatus |
| 03/21/2006 | US7016246 Three-transistor refresh-free pipelined dynamic random access memory |
| 03/21/2006 | US7016245 Tracking circuit enabling quick/accurate retrieval of data stored in a memory array |
| 03/21/2006 | US7016244 Method and arrangement for testing output circuits of high speed semiconductor memory devices |
| 03/21/2006 | US7016243 Content addressable memory having column redundancy |
| 03/21/2006 | US7016241 Semiconductor device, nonvolatile semiconductor memory, system including a plurality of semiconductor devices or nonvolatile semiconductor memories, electric card including semiconductor device or nonvolatile semiconductor memory, and electric device with which this electric card can be used |
| 03/21/2006 | US7016240 Non-destructive memory read strobe pulse optimization training system |
| 03/21/2006 | US7016239 Leakage tolerant register file |
| 03/21/2006 | US7016238 Semiconductor memory device |
| 03/21/2006 | US7016237 Data input circuit and method for synchronous semiconductor memory device |
| 03/21/2006 | US7016235 Data sorting in memories |
| 03/21/2006 | US7016234 Storage device |
| 03/21/2006 | US7016232 Non-volatile semiconductor memory device |
| 03/21/2006 | US7016229 Page buffer for NAND flash memory |
| 03/21/2006 | US7016223 Magnetoelectronic memory element with inductively coupled write wires |
| 03/21/2006 | US7016220 Magneto-resistive random access memory |
| 03/21/2006 | US7016217 Memory |
| 03/21/2006 | US7016211 DRAM-based CAM cell with shared bitlines |
| 03/21/2006 | US7015743 Circuit of redundancy IO fuse in semiconductor device |
| 03/21/2006 | US7015731 CMOS output buffer circuit |
| 03/21/2006 | US7015728 High voltage floating current sense amplifier |
| 03/21/2006 | US7015684 Semiconductor device with a negative voltage regulator |
| 03/16/2006 | WO2006028623A2 Programmable logic auto write-back |
| 03/16/2006 | WO2006027373A1 Current sense amplifier |
| 03/16/2006 | WO2006002278A3 Apparatus and method for improving dynamic refresh in a semiconductor memory device with reduced stanby power |
| 03/16/2006 | WO2005114669A3 System and method for improving performance in computer memory systems supporting multiple memory access latencies |
| 03/16/2006 | US20060059299 Apparatus and method for pipelined memory operations |
| 03/16/2006 | US20060056266 Integrated semiconductor memory comprising at least one word line and method |
| 03/16/2006 | US20060056262 Serial memory comprising means for protecting an extended memory array during a write operation |
| 03/16/2006 | US20060056261 Method for producing an extended memory array and apparatus |
| 03/16/2006 | US20060056260 Memory controller method and system compensating for memory cell data losses |
| 03/16/2006 | US20060056259 Memory controller method and system compensating for memory cell data losses |
| 03/16/2006 | US20060056258 Semiconductor memory and method for operating the same |
| 03/16/2006 | US20060056257 Semiconductor integrated circuit |
| 03/16/2006 | US20060056256 Semiconductor memory device and test method therefor |
| 03/16/2006 | US20060056255 Semiconductor memory apparatus and method for operating a semiconductor memory apparatus |
| 03/16/2006 | US20060056254 Electric circuit for providing a selection signal |
| 03/16/2006 | US20060056253 DRAM circuit and its operation method |
| 03/16/2006 | US20060056252 Memory device having open bit line cell structure using burn-in testing scheme and method therefor |
| 03/16/2006 | US20060056251 Using a phase change memory as a replacement for a dynamic random access memory |
| 03/16/2006 | US20060056250 Magnetic memory, and its operating method |
| 03/16/2006 | US20060056249 Semiconductor memory storage device and its control method |
| 03/16/2006 | US20060056248 Multi-chip semiconductor packages and methods of operating the same |
| 03/16/2006 | US20060056245 Method for generating a cue delay circuit |
| 03/16/2006 | US20060056244 Memory systems with variable delays for write data signals |
| 03/16/2006 | US20060056243 Reduction of fusible links and associated circuitry on memory dies |
| 03/16/2006 | US20060056242 Communication system |
| 03/16/2006 | US20060056241 Artificial aging of chips with memories |
| 03/16/2006 | US20060056230 Implementation of a multivibrator protected against current or voltage spikes |
| 03/16/2006 | US20060056226 Over-driven access method and device for ferroelectric memory |
| 03/16/2006 | US20060056221 Readout circuit, solid state image pickup device using the same circuit, and camera system using the same |
| 03/16/2006 | US20060054962 Method to minimize formation of recess at surface planarized by chemical mechanical planarization |
| 03/16/2006 | DE19756928B4 Verfahren zum Übersteuern eines Bitleitungs-Leseverstärkers A method of controlling a bit line sense amplifier |
| 03/16/2006 | DE19648060B4 Speichersystem zum Verarbeiten digitaler Videosignale Memory system for processing digital video signals |
| 03/16/2006 | DE10345491B4 Takt-Receiver-Schaltungsanordnung, insbesondere für Halbleiter-Bauelemente Clock receiver circuit arrangement, in particular for semi-conductor components |
| 03/16/2006 | DE102004041731B3 Speichermodul zum Bereitstellen einer Speicherkapazität Memory module for providing a storage capacity |
| 03/16/2006 | DE10110707B4 Ferroelektrischer Speicher mit Referenzzellen-Auswahlschaltung und 2T1C-Speicherzellen A ferroelectric memory with reference cell selection circuit and 2T1C memory cells |
| 03/15/2006 | EP1634301A1 Methods and apparatus for measuring current as in sensing a memory cell |
| 03/15/2006 | EP1634300A2 Signal integrity checking circuit |
| 03/15/2006 | EP1634296A2 Non-volatile electromechanical field effect devices and circuits using same and methods of forming same |
| 03/15/2006 | EP1634295A1 Adjustable clock driver circuit |
| 03/15/2006 | EP1634294A2 Bi-directional buffering for memory data lines |
| 03/15/2006 | EP1634172A2 Fault tolerant data storage circuit |
| 03/15/2006 | CN1748261A Memory device and method having low-power, high write latency mode and high-power, low write latency mode and/or independently selectable write latency |
| 03/15/2006 | CN1747170A Semiconductor device |
| 03/15/2006 | CN1747067A Circuit and method of driving bitlines of integrated circuit memory |
| 03/15/2006 | CN1747066A Semiconductor memory device having local sense amplifier with on/off control |
| 03/15/2006 | CN1747065A Methods and circuits for generating reference voltage |
| 03/15/2006 | CN1747063A Semiconductor memory devices and method of sensing bit line thereof |
| 03/15/2006 | CN1747060A Methods of operating magnetic random access memory device using spin injection and related devices |
| 03/15/2006 | CN1747058A Phase-change memory device with current control and its control method |
| 03/15/2006 | CN1747057A Memory device for reducing leakage current |
| 03/15/2006 | CN1747056A Semiconductor memory apparatus and activation signal generation method for sense amplifier |
| 03/15/2006 | CN1245721C Data reading out/recording method and driving method of semiconductor memory device |
| 03/14/2006 | US7013413 Method for compressing output data and a packet command driving type memory device |
| 03/14/2006 | US7013374 Integrated memory and method for setting the latency in the integrated memory |
| 03/14/2006 | US7013369 Memory control circuit outputting contents of a control register |
| 03/14/2006 | US7013363 Method and circuit for adjusting a self-refresh rate to maintain dynamic data at low supply voltages |
| 03/14/2006 | US7012850 High speed DRAM architecture with uniform access latency |
| 03/14/2006 | US7012848 Semiconductor integrated circuit device |
| 03/14/2006 | US7012847 Sense amplifier driver and semiconductor device comprising the same |
| 03/14/2006 | US7012846 Sense amplifier for a memory array |
| 03/14/2006 | US7012845 Nonvolatile memory with control circuit adapted to distinguish between command signal interface specifications and having an error correction function |
| 03/14/2006 | US7012844 Device information writing circuit |
| 03/14/2006 | US7012843 Device for driving a memory cell of a memory module by means of a charge store |
| 03/14/2006 | US7012841 Circuit and method for current pulse compensation |
| 03/14/2006 | US7012840 Semiconductor memory device having voltage driving circuit |
| 03/14/2006 | US7012834 Writing driver circuit of phase-change memory |
| 03/14/2006 | US7012827 Multiple electrical fuses shared with one program device |
| 03/14/2006 | US7012826 Bitline twisting structure for memory arrays incorporating reference wordlines |
| 03/14/2006 | US7012449 Input and output driver |