| Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197) |
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| 07/25/2006 | US7082069 Memory array with fast bit line precharge |
| 07/25/2006 | US7082068 Semiconductor memory device and method for adjusting internal voltage thereof |
| 07/25/2006 | US7082067 Circuit for verifying the write speed of SRAM cells |
| 07/25/2006 | US7082066 Flash memory having spare sector with shortened access time |
| 07/25/2006 | US7082064 Individual I/O modulation in memory devices |
| 07/25/2006 | US7082063 Semiconductor memory device |
| 07/25/2006 | US7082061 Memory array with low power bit line precharge |
| 07/25/2006 | US7082059 Position based erase verification levels in a flash memory device |
| 07/25/2006 | US7082048 Low voltage operation DRAM control circuits |
| 07/25/2006 | US7082046 Semiconductor memory device and method of reading data |
| 07/25/2006 | US7082045 Offset compensated sensing for magnetic random access memory |
| 07/25/2006 | US7081779 Reset signal generating circuit |
| 07/25/2006 | US7081635 High activity, spatially distributed radiation source for accurately simulating semiconductor device radiation environments |
| 07/25/2006 | US7081392 Method for fabricating a gate structure of a FET and gate structure of a FET |
| 07/20/2006 | WO2006075262A1 Circuit with a memory array and a reference level generator circuit |
| 07/20/2006 | WO2005119234A3 Measuring device and methods for use therewith |
| 07/20/2006 | US20060161743 Intelligent memory array switching logic |
| 07/20/2006 | US20060161281 Memory module with audio playback mode |
| 07/20/2006 | US20060158950 Method and system for controlling refresh to avoid memory cell data losses |
| 07/20/2006 | US20060158949 Method and system for controlling refresh to avoid memory cell data losses |
| 07/20/2006 | US20060158948 Memory device |
| 07/20/2006 | US20060158947 Reference sense amplifier for non-volatile memory |
| 07/20/2006 | US20060158946 Current sense amplifier for low voltage applications with direct sensing on the bitline of a memory matrix |
| 07/20/2006 | US20060158945 Readout circuit for semiconductor storage device |
| 07/20/2006 | US20060158944 Data path having grounded precharge operation and test compression capability |
| 07/20/2006 | US20060158943 Bit line voltage supply circuit in semiconductor memory device and voltage supplying method therefor |
| 07/20/2006 | US20060158942 Semiconductor memory device |
| 07/20/2006 | US20060158941 Serial bus controller using nonvolatile ferroelectric memory |
| 07/20/2006 | US20060158935 Method for compensated sensing in non-volatile memory |
| 07/20/2006 | US20060158927 Spin based electronic device |
| 07/20/2006 | US20060158918 Semiconductor memory device |
| 07/20/2006 | US20060158265 Semiconductor integrated circuit |
| 07/20/2006 | US20060158216 Semiconductor integrated circuit device |
| 07/20/2006 | DE112004001676T5 Direktzugriffsspeicher mit Postampel-Datenübernahmesignal-Rauschunterdrückung Random access memory with post traffic data strobe signal-to-noise suppression |
| 07/20/2006 | DE102006001082A1 Belastungszykluskorrektor Duty cycle corrector |
| 07/20/2006 | DE102004052647A1 Methode zur Verbesserung der thermischen Eigenschaften von Halbleiter-Speicherzellen Method for improving the thermal characteristics of semiconductor memory cells |
| 07/19/2006 | EP1681680A2 Dynamic column block selection |
| 07/19/2006 | CN1806230A Recording medium, data reproducing device, data recording device, and data reproducing method |
| 07/19/2006 | CN1805287A Delay locked loop using synchronous mirror delay |
| 07/19/2006 | CN1805051A 半导体存储器件 A semiconductor memory device |
| 07/19/2006 | CN1804815A Memory device for use in a memory module |
| 07/19/2006 | CN1804788A Method for implementing positioning in MP3 file with variable bit rate format |
| 07/19/2006 | CN1265555C Method and apparatus for clock circuit |
| 07/19/2006 | CN1265462C Semiconductor storage device |
| 07/19/2006 | CN1265394C Addressing method of memory matrix |
| 07/19/2006 | CN1265393C Integrated semiconductor memory with memory units of ferroelectric storage effect |
| 07/18/2006 | US7080275 Method and apparatus using parasitic capacitance for synchronizing signals a device |
| 07/18/2006 | US7079446 DRAM interface circuits having enhanced skew, slew rate and impedance control |
| 07/18/2006 | US7079445 Flash memory pipelined burst read operation circuit, method, and system |
| 07/18/2006 | US7079444 Memory system using simultaneous bi-directional input/output circuit on an address bus line |
| 07/18/2006 | US7079442 Layout of driver sets in a cross point memory array |
| 07/18/2006 | US7079441 Methods and apparatus for implementing a power down in a memory device |
| 07/18/2006 | US7079440 Method and system for providing directed bank refresh for volatile memories |
| 07/18/2006 | US7079439 Low power auto-refresh circuit and method for dynamic random access memories |
| 07/18/2006 | US7079438 Controlled temperature, thermal-assisted magnetic memory device |
| 07/18/2006 | US7079437 Nonvolatile semiconductor memory device having configuration of NAND strings with dummy memory cells adjacent to select transistors |
| 07/18/2006 | US7079436 Resistive cross point memory |
| 07/18/2006 | US7079435 Sense amplifier circuit to write data at high speed in high speed semiconductor memory |
| 07/18/2006 | US7079434 Noise suppression in memory device sensing |
| 07/18/2006 | US7079433 Wafer level burn-in of SRAM |
| 07/18/2006 | US7079432 Semiconductor storage device formed to optimize test technique and redundancy technology |
| 07/18/2006 | US7079431 Arrangement with a memory for storing data |
| 07/18/2006 | US7079430 Memory device with built-in error-correction capabilities |
| 07/18/2006 | US7079429 Semiconductor memory device |
| 07/18/2006 | US7079428 Circuit for distribution of an input signal to one or more time positions |
| 07/18/2006 | US7079427 System and method for a high-speed access architecture for semiconductor memory |
| 07/18/2006 | US7079426 Dynamic multi-Vcc scheme for SRAM cell stability control |
| 07/18/2006 | US7079425 Data output circuit in a semiconductor memory device and control method of a data output circuit |
| 07/18/2006 | US7079413 Semiconductor memory device with back gate potential control circuit for transistor in memory cell |
| 07/18/2006 | US7079412 Programmable MOS device formed by stressing polycrystalline silicon |
| 07/18/2006 | US7079411 Ferroelectric nonvolatile code data output device |
| 07/18/2006 | US7078945 Semiconductor device having logic circuit and macro circuit |
| 07/18/2006 | US7078935 Simultaneous bi-directional transceiver |
| 07/18/2006 | US7078610 Electronic percussion instrument |
| 07/18/2006 | CA2236336C Regulated dram cell plate and precharge voltage generator |
| 07/13/2006 | WO2006073891A2 Highly portable media device |
| 07/13/2006 | WO2006073308A1 Method for operating a passive matrix-addressable ferroelectric or electret memory device |
| 07/13/2006 | WO2006055497A3 Command controlling different operations in different chips |
| 07/13/2006 | US20060155947 Selectable block protection for non-volatile memory |
| 07/13/2006 | US20060155884 Apparatus and method for selectively configuring a memory device using a bi-stable relay |
| 07/13/2006 | US20060152994 Timer lockout circuit for synchronous applications |
| 07/13/2006 | US20060152989 Method and system for controlling refresh to avoid memory cell data losses |
| 07/13/2006 | US20060152988 Memory component having a novel arrangement of the bit lines |
| 07/13/2006 | US20060152987 Dual stage DRAM memory equalization |
| 07/13/2006 | US20060152986 Integrated semiconductor memory device with adaptation of the evaluation characteristic of sense amplifiers |
| 07/13/2006 | US20060152985 Output power testing apparatus for memory |
| 07/13/2006 | US20060152984 Memory component and addressing of memory cells |
| 07/13/2006 | US20060152983 Memory device and method having low-power, high write latency mode and high-power, low write latency mode and/or independently selectable write latency |
| 07/13/2006 | US20060152982 Integrated semiconductor memory device with test circuit for sense amplifier |
| 07/13/2006 | US20060152981 Solid state disk controller apparatus |
| 07/13/2006 | US20060152980 Low-power delay buffer circuit |
| 07/13/2006 | US20060152979 Semiconductor memory device |
| 07/13/2006 | US20060152968 Spin based device with low transmission barrier |
| 07/13/2006 | US20060152400 Semiconductor integrated circuit |
| 07/13/2006 | US20060152399 Semiconductor integrated circuit |
| 07/13/2006 | DE19952311B4 Integrierter Speicher mit Speicherzellen vom 2-Transistor/2-Kondensator-Typ Integrated memory having memory cells of the 2-transistor / 2-capacitor type |
| 07/13/2006 | DE112004001660T5 Echotakt auf Speichersystem mit Warteinformationen Echo clock on storage system with waiting information |
| 07/13/2006 | DE102005061911A1 Verzögerungsregelschleife, die eine Synchronspiegelverzögerung verwendet Delay locked loop that uses a synchronous mirror delay |
| 07/13/2006 | DE102005057169A1 Variable Pipeline-Schaltung Variable pipeline circuit |
| 07/13/2006 | DE102005056351A1 Speichervorrichtung, Speichersteuereinheit und Verfahren zum Betreiben derselben Memory device, memory controller and method of operating the same |