Patents
Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197)
06/2006
06/15/2006US20060129865 Method and apparatus for data transfer
06/15/2006US20060129752 Burst write in a non-volatile memory device
06/15/2006US20060128097 Nonvolatile memory cells with buried channel transistors
06/15/2006US20060126417 Semiconductor memory device
06/15/2006US20060126414 Method for activating a plurality of word lines in a refresh cycle, and electronic memory device
06/15/2006US20060126413 Memory circuit and method for reading out a memory datum from such a memory circuit
06/15/2006US20060126412 Integrated circuit device having a test circuit to measure AC characteristics of internal memory macro
06/15/2006US20060126411 Pipelined burst memory access
06/15/2006US20060126407 Methods for repairing and for operating a memory component
06/15/2006US20060126406 Memory system and method for strobing data, command and address signals
06/15/2006US20060126405 Apparatus with equalizing voltage generation circuit and methods of use
06/15/2006US20060126404 Low power multi-chip semiconductor memory device and chip enable method thereof
06/15/2006US20060126403 Semiconductor driver circuit with signal swing balance and enhanced testing
06/15/2006US20060126402 Mainboard, electronic component, and controlling method of logic operation
06/15/2006US20060126401 Reducing DQ pin capacitance in a memory device
06/15/2006US20060126400 Semiconductor integrated circuit
06/15/2006US20060126393 Data recovery methods in multi-state memory after program fail
06/15/2006US20060126385 Flash memory device with burst read mode of operation
06/15/2006US20060126381 Method of writing to a phase change memory device
06/15/2006US20060126377 Semiconductor memory device
06/15/2006US20060126370 Memory architecture and method of manufacture and operation thereof
06/15/2006US20060125573 Novel radio frequency (RF) circuit board topology
06/14/2006EP1669999A1 Semiconductor memory
06/14/2006EP1668671A2 Apparatus and method for selectively configuring a memory device using a bi-stable relay
06/14/2006EP1668646A1 Method and apparatus for implicit dram precharge
06/14/2006EP1668645A1 Clock receiver circuit arrangement, especially for semiconductor components
06/14/2006EP1668517A1 Selectable block protection for non-volatile memory
06/14/2006EP1668510A1 System and method for adaptive duty cycle optimization
06/14/2006EP1668465A2 Device used for the synchronization of clock signals, and clock signal synchronization method
06/14/2006DE19921259B4 Nichtflüchtiger ferroelektrischer Speicher Non-volatile ferroelectric memory
06/14/2006DE19636743B4 Halbleiterspeichervorrichtung mit Datenausgabewegen für einen schnellen Zugriff Semiconductor memory device with data output paths for quick access
06/14/2006DE19549156B4 Datensignalverteilungsschaltung für ein Synchronspeicherelement Data signal distribution circuit for a synchronous memory device
06/14/2006DE10260344B4 Magnetische Dünnfilmspeichervorrichtung, die Daten mit bidirektionalem Strom schreibt Thin film magnetic memory device which writes data with bidirectional current
06/14/2006DE102005054432A1 Direktzugriffsspeicher mit schnellem Spaltenzugriff Random access memory with fast access columns
06/14/2006DE102004059723A1 Memory component has memory cells and bitlines connected to read amplifier with neighboring bitlines connected to neighboring read amplifiers
06/14/2006DE102004059447A1 Integrated circuit for analysis of input signal characteristics has one port for first input signal, which adopts first and second state during first signal period and another port for second input signal
06/14/2006CN1788321A Method and apparatus for establishing and maintaining desired read latency in high-speed DRAM
06/14/2006CN1788243A Low power signal input circuit and method for input signals of integrated circuits
06/14/2006CN1787109A Method for controlling data flowing of high speed memory body
06/14/2006CN1787108A Method and apparatus for partitioned memory
06/14/2006CN1786931A Apparatus and method for access of fast flash memory cord
06/14/2006CN1259624C Semiconductor device
06/13/2006US7062619 Mass storage device architecture and operation
06/13/2006US7062616 Implementing a dual partition flash with suspend/resume capabilities
06/13/2006US7062597 Integrated circuit buffer device
06/13/2006US7062587 Unidirectional bus architecture for SoC applications
06/13/2006US7061988 Interleaver memory access apparatus and method of mobile communication system
06/13/2006US7061827 Semiconductor memory device
06/13/2006US7061825 Semiconductor integrated circuit
06/13/2006US7061822 Clock generator for pseudo dual port memory
06/13/2006US7061821 Address wrap function for addressable memory devices
06/13/2006US7061819 Memory device
06/13/2006US7061818 Memory and refresh method for memory
06/13/2006US7061816 Semiconductor memory storage device and its redundant method
06/13/2006US7061815 Semiconductor memory device providing redundancy
06/13/2006US7061814 Semiconductor device realized by using partial SOI technology
06/13/2006US7061813 Page buffer of non-volatile memory device and method of programming and reading non-volatile memory device
06/13/2006US7061809 Nonvolatile semiconductor memory device including a plurality of blocks and a sensing circuit provided in each of the blocks for comparing data with a reference signal having a load imposed thereon
06/13/2006US7061802 Semiconductor integrated circuit device
06/13/2006US7061794 Wordline-based source-biasing scheme for reducing memory cell leakage
06/13/2006US7061793 Apparatus and method for small signal sensing in an SRAM cell utilizing PFET access devices
06/13/2006US7061792 Low AC power SRAM architecture
06/13/2006US7061786 Semiconductor memory device and memory system
06/13/2006US7061784 Semiconductor memory module
06/13/2006US7061496 Image data processing system and image data reading and writing method
06/13/2006US7061485 Method and system for producing a model from optical images
06/13/2006US7061408 Concept for a secure data communication between electronic devices
06/13/2006US7061287 Delay locked loop
06/13/2006US7061270 Semiconductor integrated circuit, electronic equipment, and transistor back-gate voltage control method
06/13/2006US7061267 Page boundary detector
06/13/2006US7061043 Non-volatile semiconductor memory device and method of manufacturing the same
06/13/2006US7061013 Phase change storage cells for memory devices, memory devices having phase change storage cells and methods of forming the same
06/08/2006WO2006060151A2 Temperature based dram refresh
06/08/2006WO2006058647A1 Memory circuit and method for analysing memory datum of a cbram resistance memory cell
06/08/2006WO2005098862A3 Reconstruction of signal timing in integrated circuits
06/08/2006WO2005024833A3 A parallel asynchronous propagation pipeline structure to access multiple memory arrays
06/08/2006US20060123276 Information storage medium, information recording method and information processing method
06/08/2006US20060120194 EEPROM device having selecting transistors and method fabricating the same
06/08/2006US20060120193 System and method for reducing power consumption during extended refresh periods of dynamic random access memory devices
06/08/2006US20060120192 Storage device, and storage part and dummy unit for storage device
06/08/2006US20060120190 Semiconductor integrated circuit
06/08/2006US20060120189 Logic synthesis of multi-level domino asynchronous pipelines
06/08/2006US20060120188 Defect detection circuit
06/08/2006US20060120186 Semiconductor memory device with shift redundancy circuits
06/08/2006US20060120185 System and method for configuring an integrated circuit
06/08/2006US20060120184 Sense amplifier driver and semiconductor device comprising the same
06/08/2006US20060120183 System and method for monitoring active device by restoring symbol table in duplexing system
06/08/2006US20060120182 Semiconductor memory device having local data line pair with delayed precharge voltage application point
06/08/2006US20060120181 Fault detection and isolation with analysis of built-in-test results
06/08/2006US20060120180 Output driver capable of controlling slew rate of output signal according to operating frequency information or CAS latency information
06/08/2006US20060120179 Voltage generation circuit and semiconductor memory device including the same
06/08/2006US20060120178 Semiconductor memory devices
06/08/2006US20060120176 Integrated semiconductor memory with test circuit
06/08/2006US20060120175 Memory array with fast bit line precharge
06/08/2006US20060120174 Memory array with low power bit line precharge
06/08/2006US20060120173 Integrated circuit memory devices having data output ports that support extended read cycle time intervals
06/08/2006US20060120172 Page-buffer and non-volatile semiconductor memory including page buffer
06/08/2006US20060120171 Seamless handoff of mobile terminal
06/08/2006US20060120170 Mounting apparatus for data storage device
06/08/2006US20060120169 Semiconductor integrated circuit