Patents
Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197)
03/2006
03/09/2006WO2006026526A2 Memory system and method for strobing data, command and address signals
03/09/2006WO2006026043A1 Approach for zero dummy byte flash memory read operation
03/09/2006US20060050603 Parallel asynchronous propagation pipeline structure and methods to access multiple memory arrays
03/09/2006US20060050588 Semiconductor integrated circuit device
03/09/2006US20060050587 Fully-hidden refresh dynamic random access memory
03/09/2006US20060050586 Semiconductor memory device
03/09/2006US20060050585 Device for setting up a write current in an MRAM type memory and memory comprising
03/09/2006US20060050584 Current sense amplifier
03/09/2006US20060050583 Semiconductor integrated circuit device
03/09/2006US20060050582 Method and apparatus for a sense amplifier
03/09/2006US20060050581 Sense amplifier circuits and high speed latch circuits using gated diodes
03/09/2006US20060050578 Decoder of semiconductor memory device
03/09/2006US20060050576 NAND flash memory device and copyback program method for same
03/09/2006US20060050575 Row decoder for NAND memories
03/09/2006US20060050574 Memory device with column select being variably delayed
03/09/2006US20060050573 Semiconductor memory devices and methods of delaying data sampling signal
03/09/2006US20060050572 Memory circuit with supply voltage flexibility and supply voltage adapted performance
03/09/2006US20060050571 Transmitter of a semiconductor device
03/09/2006US20060050569 Semiconductor memory apparatus and activation signal generation method for sense amplifier
03/09/2006US20060050568 Programmable logic auto write-back
03/09/2006US20060050567 Using transfer bits during data transfer from non-volatile to volatile memories
03/09/2006US20060050562 Non-volatile memory and method with improved sensing
03/09/2006DE19924244B4 Integrierter Speicher mit redundanten Einheiten von Speicherzellen und Testverfahren für seine redundanten Einheiten Integrated memory having redundant units of memory cells and assay methods for its redundant units
03/09/2006DE102005041034A1 Memory module e.g. single in-line memory module, has selection circuit which outputs non-periodic clock signal to memory and register, and register which controls address data of memory in synchronization with received signal
03/09/2006DE102004042173A1 DQS-Signalling in DDR-III-Speichersystemen ohne Präambel DQS signaling in DDR III memory systems without preamble
03/09/2006DE102004041027A1 Speichermodul Memory module
03/09/2006DE102004040753A1 Circuit arrangement for information storage in cells of the CBRAM-type, has write transistor and constant current source arranged in symmetrical current circuit
03/09/2006DE102004040750A1 Speicherzellenanordnung mit Speicherzellen vom CBRAM-Typ und Verfahren zum Programmieren von Speicherzellen vom CBRAM-Typ Memory cell array having memory cells of the CBRAM type and method for programming memory cells CBRAM type
03/08/2006EP1633049A2 Delay locked loop circuitry for clock delay adjustment
03/08/2006EP1632949A2 Integrated semiconductor memory with clock generator
03/08/2006EP1632845A2 Processor with a register file that supports multiple-issue execution
03/08/2006EP1632051A2 Dynamic synchronization of data capture on an optical or other high speed communications link
03/08/2006EP1631966A2 Transplanted magnetic random access memory (mram) devices on thermally-sensitive substrates using laser transfer and method for making the same
03/08/2006EP1442454A4 Digital audio device
03/08/2006CN1745431A Information storage
03/08/2006CN1744230A Semiconductor memory devices having column redundancy circuits therein that support multiple memory blocks
03/08/2006CN1744228A Memory module, memory unit, and hub with non-periodic clock and methods of using the same
03/08/2006CN1244932C High density semiconductor memory having diagonal bit lines and dual word lines
03/08/2006CN1244558C 1,2-hydrindene or indoline derivative
03/07/2006US7010643 Status register to improve initialization of a synchronous memory
03/07/2006US7010642 System featuring a controller device and a memory module that includes an integrated circuit buffer device and a plurality of integrated circuit memory devices
03/07/2006US7010372 Semiconductor memory card, apparatus for recording data onto the semiconductor memory card, and apparatus for reproducing data of the semiconductor memory card
03/07/2006US7009922 Cross-talk removal apparatus and data reproduction apparatus
03/07/2006US7009905 Method and apparatus to reduce bias temperature instability (BTI) effects
03/07/2006US7009904 Back-bias voltage generator with temperature control
03/07/2006US7009903 Sense amplifying magnetic tunnel device
03/07/2006US7009902 Semiconductor memory having a first and second sense amplifier for sensing a memory cell voltage during a normal mode and a refresh mode
03/07/2006US7009901 System and method for sensing data stored in a resistive memory element using one bit of a digital count
03/07/2006US7009900 Circuit arrangement for reading out, evaluating and reading in again a charge state into a memory cell
03/07/2006US7009899 Bit line precharge signal generator for memory device
03/07/2006US7009898 PSRAM for performing write-verify-read function
03/07/2006US7009897 Semiconductor memory device capable of applying stress voltage to bit line pair
03/07/2006US7009896 Apparatus and method for managing bad blocks in a flash memory
03/07/2006US7009895 Method for skip over redundancy decode with very low overhead
03/07/2006US7009894 Dynamically activated memory controller data termination
03/07/2006US7009893 Range selectable address decoder and frame memory device for processing graphic data at high speed using the same
03/07/2006US7009892 Semiconductor memory device and portable electronic apparatus
03/07/2006US7009891 System and method for one-time programmed memory through direct-tunneling oxide breakdown
03/07/2006US7009875 Magnetic memory device structure
03/07/2006US7009863 Memory module with integrated bus termination
03/07/2006US7009862 Semiconductor device
03/07/2006US7009637 Portable multi-function apparatus and controller
03/07/2006US7009439 Circuit and method for generating internal clock signal
03/07/2006US7009434 Generating multi-phase clock signals using hierarchical delays
03/07/2006US7009423 Programmable I/O interfaces for FPGAs and other PLDs
03/07/2006US7009420 Input circuit for receiving a signal at an input on an integrated circuit
03/02/2006WO2006023391A1 Memory device having staggered memory operations
03/02/2006WO2006023387A1 Individual data line strobe-offset control in memory systems
03/02/2006WO2006023146A2 Self-adaptive program delay circuitry for programmable memories
03/02/2006WO2005106667A3 Error correction in an electronic circuit
03/02/2006WO2005096315A3 Thermally stable reference voltage generator for mram
03/02/2006US20060047890 Sdram address mapping optimized for two-dimensional access
03/02/2006US20060047861 Method for soft configuring communication protocols
03/02/2006US20060047352 Recording and/or reproducing apparatus and recording apparatus
03/02/2006US20060044965 Emergency recording on an information recording apparatus
03/02/2006US20060044933 Burst read addressing in a non-volatile memory device
03/02/2006US20060044916 Zero-enabled fuse-set
03/02/2006US20060044915 Flash memory device using semiconductor fin and method thereof
03/02/2006US20060044914 Semiconductor memory devices in which the number of memory banks to be refreshed may be changed and methods of operating the same
03/02/2006US20060044913 Memory system and method using ECC to achieve low power refresh
03/02/2006US20060044912 Method and apparatus for refreshing memory device
03/02/2006US20060044911 Semiconductor storage apparatus
03/02/2006US20060044910 Temperature-dependent dram self-refresh circuit
03/02/2006US20060044909 Method and system for reducing the peak current in refreshing dynamic random access memory devices
03/02/2006US20060044908 Noise suppression in memory device sensing
03/02/2006US20060044907 Sample and hold memory sense amplifier
03/02/2006US20060044906 Sensing of resistance variable memory devices
03/02/2006US20060044905 Input and output buffers having symmetrical operating characteristics and immunity from voltage variations
03/02/2006US20060044904 Bit line sense amplifier control circuit
03/02/2006US20060044903 Switched capacitor DRAM sense amplifier with immunity to mismatch and offsets
03/02/2006US20060044902 Memory unit with sensing current stabilization
03/02/2006US20060044901 Dual stage dram memory equalization
03/02/2006US20060044900 Method for testing an integrated semiconductor memory
03/02/2006US20060044894 Enhanced timing margin memory interface
03/02/2006US20060044893 Non-volatile one time programmable memory
03/02/2006US20060044892 Method for detecting data strobe signal
03/02/2006US20060044891 Memory system and method for strobing data, command and address signals
03/02/2006US20060044890 Semiconductor storage apparatus
03/02/2006US20060044889 Internal voltage level control circuit and semiconductor memory device as well as method of controlling the same
03/02/2006US20060044888 Level shifter for low voltage operation