Patents
Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197)
09/2006
09/14/2006US20060203575 Memory with data latching circuit including a selector
09/14/2006US20060203574 Pre-emphasis for strobe signals in memory device
09/14/2006US20060203573 Semiconductor device, semiconductor memory device and data strobe method
09/14/2006US20060203572 Low supply voltage temperature compensated reference voltage generator and method
09/14/2006US20060203571 Input and output buffers having symmetrical operating characteristics and immunity from voltage variations
09/14/2006US20060203570 System and method for storing a sequential data stream
09/14/2006US20060203569 Current mode output driver
09/14/2006US20060203568 Overdrive period control device and overdrive period determining method
09/14/2006US20060203567 Integrated memory circuit and method for repairing a single bit error
09/14/2006US20060203545 Memory Sensing Circuit and Method for Low Voltage Operation
09/14/2006US20060203532 Early read after write operation memory device, system and method
09/14/2006DE102006010744A1 Speichervorrichtung mit Chipexterntreiberaktivierungsschaltung und Verfahren zum Verringern von Verzögerungen während Leseoperationen External memory device with chip driver enabling circuit and method for reducing delays during read operations
09/14/2006DE102005057980A1 Halbleiterschaltung Semiconductor circuit
09/14/2006DE102005028642A1 Flash-Speicherbauelemt mit verbesserter Löschfunktion und Verfahren zur Steuerung einer Löschoperation desselben Thereof flash Speicherbauelemt with improved erase function and method of controlling an erase operation
09/14/2006DE102005009806A1 Buffer component for use in e.g. dynamic random access memory module, has control unit setting control signal for activating memory chips group with consecutive address and command signals, so that signals are taken to memory chips of group
09/14/2006DE102005002749B3 Identification data storing method for use on radio frequency identification tag of luggage item in airport, involves isolating identification tag after storage phase, in which data are stored into non-volatile memory unit
09/14/2006DE102004057231B4 Verfahren zum Übertragen eines elektrischen Signals und Ausgangstreiberschaltung für ein zu übertragendes elektrisches Signal A method of transmitting an electrical signal and output driver circuit for an electrical signal to be transmitted
09/14/2006DE10131492B4 Verfahren zum Herstellen einer Halbleiterspeichervorrichtung A method of manufacturing a semiconductor memory device
09/13/2006EP1701354A1 Memory module with audio playback mode
09/13/2006EP1701353A1 Portable electronic assembly with media playback function
09/13/2006EP1701352A2 Memory device having dummy bitlines connected to voltage generator in order to prevent current leakage to substrate
09/13/2006EP1700314A1 Flexible and area efficient column redundancy for non-volatile memories
09/13/2006EP1700308A1 Fixed phase clock and strobe signals in daisy chained chips
09/13/2006EP1238393B1 Mobile communication device having integrated embedded flash and sram memory
09/13/2006EP1023731B1 Sense amplifier for flash memories
09/13/2006CN2817272Y Blue tooth earphone with music playing function
09/13/2006CN2816928Y Luminous andio-frequency playing apparatus
09/13/2006CN1833293A Method and apparatus for measuring current as in sensing a memory cell
09/13/2006CN1832165A Stacked dram memory chip for a dual inline memory module (dimm)
09/13/2006CN1832049A Memory addressing error protection systems and methods
09/13/2006CN1832036A Memory output stage circuit and method of memory data output
09/13/2006CN1832035A DDR memory controller and matrix line access method for matrix transposition
09/13/2006CN1832034A Method and circuit for generating high voltage and semiconductor memory device having the same
09/13/2006CN1832032A 半导体存储器 Semiconductor memory
09/13/2006CN1832030A 电子电路 Electronic circuit
09/13/2006CN1832029A Semiconductor apparatus
09/13/2006CN1832028A Multi-port memory based on dram core
09/13/2006CN1832027A Circuit for data bit inversion
09/13/2006CN1832026A Semiconductor memory unit and data read method of the same
09/13/2006CN1832025A Audio playing method and system in game of mobile phone
09/13/2006CN1832024A Nand flash memory device and program method thereof
09/13/2006CN1832023A Operating method of memory cell array, non-volatile memory and method of manufacturing thereof
09/13/2006CN1832022A 存储器程序控制电路 Program memory control circuit
09/13/2006CN1832021A 半导体装置 Semiconductor device
09/13/2006CN1832020A Integrated memory device and memory module
09/13/2006CN1831725A Method and apparatus for controlling a user interface of a consumer electronic device
09/13/2006CN1275224C Voice letter box system and recording-playing method
09/12/2006US7107500 Test mode circuit of semiconductor memory device
09/12/2006US7107479 Apparatus and method for bidirectional transfer of data by a base station
09/12/2006US7107476 Memory system using non-distributed command/address clock signals
09/12/2006US7107467 Semiconductor memory device having a circuit for removing noise from a power line of the memory device using a plurality of decoupling capactors
09/12/2006US7107424 Memory read strobe pulse optimization training system
09/12/2006US7107415 Posted write buffers and methods of posting write requests in memory modules
09/12/2006US7107399 Scalable memory
09/12/2006US7107387 Control module comprising a ROM with reduced electrical consumption
09/12/2006US7107178 Temperature sensing circuit for use in semiconductor integrated circuit
09/12/2006US7106654 Arrangement comprising a memory device and a program-controlled unit
09/12/2006US7106653 Semiconductor memory device and data read method of the same
09/12/2006US7106651 Semiconductor memory device and method of reading data from semiconductor memory device
09/12/2006US7106650 Semiconductor memory device
09/12/2006US7106648 X-address extractor and memory for high speed operation
09/12/2006US7106647 Internal voltage supply circuit
09/12/2006US7106646 Circuit and method for controlling a clock synchronizing circuit for low power refresh operation
09/12/2006US7106645 Semiconductor memory device having a word line drive circuit and a dummy word line drive circuit
09/12/2006US7106643 Method for manufacturing memory device provided with a defect recovery mechanism featuring a redundancy circuit
09/12/2006US7106642 Semiconductor integrated circuit device in which a measure to counter soft errors is taken
09/12/2006US7106641 Dynamic semiconductor memory device
09/12/2006US7106640 Semiconductor memory device capable of detecting repair address at high speed
09/12/2006US7106639 Defect management enabled PIRM and method
09/12/2006US7106638 Active termination circuit and method for controlling the impedance of external integrated circuit terminals
09/12/2006US7106637 Asynchronous interface circuit and method for a pseudo-static memory device
09/12/2006US7106636 Partitionable memory device, system, and method
09/12/2006US7106635 Bitline booster circuit and method
09/12/2006US7106634 Semiconductor memory device and method of inputting or outputting data in the semiconductor memory device
09/12/2006US7106632 Integrated circuit with analog or multilevel storage cells and user-selectable sampling frequency
09/12/2006US7106631 Semiconductor device
09/12/2006US7106627 Nonvolatile semiconductor memory device with redundancy and security information circuitry
09/12/2006US7106626 Serially sensing the output of multilevel cell arrays
09/12/2006US7106614 Memory circuit and method for providing an item of information for a prescribed period of time
09/12/2006US7106612 Semiconductor memory device using tapered arrangement of local input and output sense amplifiers
09/12/2006US7106610 High speed memory interface
09/12/2006US7106609 Computer memory cards using flash EEPROM integrated circuit chips and memory-controller systems
09/12/2006US7106112 Apparatus for generating power-up signal
09/12/2006US7104459 Information storage apparatus and information processing apparatus using the same
09/08/2006WO2005081254A8 Method and system for providing temperature dependent programming for magnetic memories
09/07/2006US20060200729 Data storing method of dynamic RAM and semiconductor memory device
09/07/2006US20060200642 System and method for an asynchronous data buffer having buffer write and read pointers
09/07/2006US20060200628 Portable data storage device
09/07/2006US20060200602 Method and system for capturing and bypassing memory transactions in a hub-based memory system
09/07/2006US20060198234 Double data rate scheme for data output
09/07/2006US20060198230 Memory device having terminals for transferring multiple types of data
09/07/2006US20060198229 Memory device having terminals for transferring multiple types of data
09/07/2006US20060198226 Semiconductor storage device and operating method therefor
09/07/2006US20060198225 Reducing power consumption in a data storage system
09/07/2006US20060198224 Magnetic memory device
09/07/2006US20060198223 Integrated semiconductor memory having activatable sense amplifiers
09/07/2006US20060198222 Minimizing adjacent wordline disturb in a memory device
09/07/2006US20060198221 Minimizing adjacent wordline disturb in a memory device
09/07/2006US20060198220 Open digit line array architecture for a memory array
09/07/2006US20060198219 Semiconductor integrated circuit device