| Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197) |
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| 10/12/2006 | US20060227625 Method and apparatus for capturing full-screen frames |
| 10/12/2006 | US20060227624 Semiconductor memory device |
| 10/12/2006 | US20060227623 Address latch signal generation circuit and address decoding circuit |
| 10/12/2006 | US20060227593 Low voltage operation dram control circuits |
| 10/12/2006 | US20060226463 Merged MOS-bipolar capacitor memory cell |
| 10/11/2006 | EP1710806A1 Mobile communication device having integrated embedded flash and sram memory |
| 10/11/2006 | EP1710805A1 SRAM memory device with instantaneous reset and corresponding instantaneous reset procedure |
| 10/11/2006 | EP1710804A2 Line layout structure, semiconductor memory device, and layout method |
| 10/11/2006 | EP1709644A1 Memory device having multiple-function strobe terminals |
| 10/11/2006 | EP1709541A1 Apparatus and method for use of memory devices for audio |
| 10/11/2006 | EP1290561A4 Multiple access per cycle in a multiple bank dimm |
| 10/11/2006 | CN2826367Y Sport stepping type MP3 |
| 10/11/2006 | CN1846201A Circuit system and method for coupling a circuit module to or for decoupling same from a main bus |
| 10/11/2006 | CN1845329A Layout structure in semiconductor memory device and layout method therefor |
| 10/11/2006 | CN1845251A Semiconductor memory and method for accessing semiconductor memory |
| 10/11/2006 | CN1845250A DRAM stacked package, DIMM, and semiconductor manufacturing method |
| 10/11/2006 | CN1844918A Food hygiene management and control system employing radio frequency to identify |
| 10/11/2006 | CN1279542C Apparatus and method for labeling storage content |
| 10/11/2006 | CN1279541C Semiconductor memory for Hierarchical prefetch |
| 10/11/2006 | CN1279451C Drive capacity setting method and its driver circuit |
| 10/11/2006 | CN1279432C Storage and reproduction apparatus |
| 10/10/2006 | US7120818 Method and device for data transfer |
| 10/10/2006 | US7120777 Device identification using a memory profile |
| 10/10/2006 | US7120761 Multi-port memory based on DRAM core |
| 10/10/2006 | US7120754 Synchronous DRAM with selectable internal prefetch size |
| 10/10/2006 | US7120736 Storage unit and circuit for shaping communication signal |
| 10/10/2006 | US7120723 System and method for memory hub-based expansion bus |
| 10/10/2006 | US7120549 Temperature compensated self-refresh (TCSR) circuit having a temperature sensor limiter |
| 10/10/2006 | US7120509 Sound and image producing system |
| 10/10/2006 | US7120214 Synchronous signal transfer and processing device |
| 10/10/2006 | US7120086 Semiconductor circuit |
| 10/10/2006 | US7120085 Pseudo SRAM having combined synchronous and asynchronous mode register set |
| 10/10/2006 | US7120081 Multi-port memory device with stacked banks |
| 10/10/2006 | US7120080 Dual port semiconductor memory device |
| 10/10/2006 | US7120079 Flash/dynamic random access memory field programmable gate array |
| 10/10/2006 | US7120078 Synchronous semiconductor memory |
| 10/10/2006 | US7120077 Memory module having a plurality of integrated memory components |
| 10/10/2006 | US7120076 Semiconductor memory device |
| 10/10/2006 | US7120075 Multi-FIFO integrated circuit devices that support multi-queue operating modes with enhanced write path and read path queue switching |
| 10/10/2006 | US7120074 Semiconductor memory and method for operating a semiconductor memory |
| 10/10/2006 | US7120073 Integrated circuit devices having reducing variable retention characteristics |
| 10/10/2006 | US7120072 Two transistor gain cell, method, and system |
| 10/10/2006 | US7120071 Test method for a semiconductor memory |
| 10/10/2006 | US7120070 Method for testing the serviceability of bit lines in a DRAM memory device |
| 10/10/2006 | US7120068 Column/row redundancy architecture using latches programmed from a look up table |
| 10/10/2006 | US7120067 Memory with data latching circuit including a selector |
| 10/10/2006 | US7120066 Memory device for multiplexing input and output operation |
| 10/10/2006 | US7120065 Techniques for implementing accurate operating current values stored in a database |
| 10/10/2006 | US7120061 Method and apparatus for a dual power supply to embedded non-volatile memory |
| 10/10/2006 | US7120056 Semiconductor memory device capable of being mounted on a single package regardless of bit organization |
| 10/10/2006 | US7120054 Preconditioning global bitlines |
| 10/10/2006 | US7120044 Method and circuit for reading data from a ferroelectric memory cell |
| 10/10/2006 | US7120042 Ferroelectric memory device having test memory cell |
| 10/10/2006 | US7120041 Memory device with programmable parameter controller |
| 10/10/2006 | US7119603 Static, low-voltage fuse-based cell with high-voltage programming |
| 10/10/2006 | US7119592 Delay locked loop circuit with time delay quantifier and control |
| 10/10/2006 | US7119388 MRAM device fabricated using chemical mechanical polishing |
| 10/05/2006 | WO2006105546A1 Variable memory array self-refresh rates in suspend and standby modes |
| 10/05/2006 | WO2006105543A2 Temperature determination and communication for multiple devices of a memory module |
| 10/05/2006 | WO2006103538A2 Audio information device |
| 10/05/2006 | US20060224897 Access control service and control server |
| 10/05/2006 | US20060224800 External connection device, host device and data communication system |
| 10/05/2006 | US20060221791 Recording medium, method of configuring control information thereof, recording and/or reproducing method using the same, and apparatus thereof |
| 10/05/2006 | US20060221790 Recording medium, method of configuring control information thereof, recording and/or reproducing method using the same, and apparatus thereof |
| 10/05/2006 | US20060221748 Method and system for reducing the peak current in refreshing dynamic random access memory devices |
| 10/05/2006 | US20060221747 Dynamic arrays and overlays with bounds policies |
| 10/05/2006 | US20060221746 Pseudo SRAM |
| 10/05/2006 | US20060221745 Circuit and method for selecting test self-refresh period of semiconductor memory device |
| 10/05/2006 | US20060221744 Refresh circuit for use in semiconductor memory device and operation method thereof |
| 10/05/2006 | US20060221743 Internal Voltage Supply Circuit |
| 10/05/2006 | US20060221742 Semiconductor memory device |
| 10/05/2006 | US20060221741 Temperature determination and communication for multiple devices of a memory module |
| 10/05/2006 | US20060221740 Sense Amplifier Overdriving Circuit and Semiconductor Device Using the Same |
| 10/05/2006 | US20060221739 Page buffer circuit of flash memory device with improved read operation function and method of controlling read operation thereof |
| 10/05/2006 | US20060221738 Pre-charge Voltage Supply Circuit of Semiconductor Device |
| 10/05/2006 | US20060221737 Data compression read mode for memory testing |
| 10/05/2006 | US20060221736 Data compression read mode for memory testing |
| 10/05/2006 | US20060221727 Semiconductor memory device and semiconductor device |
| 10/05/2006 | US20060221726 Over driving control signal generator in semiconductor memory device |
| 10/05/2006 | US20060221725 Semiconductor integrated circuit device |
| 10/05/2006 | US20060221724 Data converter and a delay threshold comparator |
| 10/05/2006 | US20060221723 Data latch circuit of semiconductor device and method for latching data signal |
| 10/05/2006 | US20060221722 Data output buffer whose mode switches according to operation frequency and semiconductor memory device having the same |
| 10/05/2006 | US20060221721 Computer system, storage device and computer software and data migration method |
| 10/05/2006 | US20060221720 Distributed-state-information-based distributed computing systems and methods and protocols for managing distributed state information |
| 10/05/2006 | US20060221719 Semiconductor memory card, semiconductor memory control apparatus, and semiconductor memory control method |
| 10/05/2006 | US20060221718 Memory module and memory system having data protection function, and method for controlling the memory module |
| 10/05/2006 | US20060221717 Data output apparatus and method |
| 10/05/2006 | US20060221716 Semiconductor integrated circuit |
| 10/05/2006 | US20060221715 Redundant non-volatile memory cell |
| 10/05/2006 | US20060221714 Read operation for non-volatile storage that includes compensation for coupling |
| 10/05/2006 | US20060221713 Write-once read-many times memory |
| 10/05/2006 | US20060221712 Using a bit specific reference level to read a memory |
| 10/05/2006 | US20060221711 Semiconductor recording device |
| 10/05/2006 | US20060221710 Information processing device, information processing method, program recording medium |
| 10/05/2006 | US20060221671 Individual I/O modulation in memory devices |
| 10/05/2006 | US20060220746 Sensing circuit |
| 10/05/2006 | US20060220459 Sensing circuits |
| 10/05/2006 | US20060220229 Methods and apparatus for a flexible circuit interposer |
| 10/05/2006 | US20060220228 Methods and apparatus for a flexible circuit interposer |