| Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008) |
|---|
| 09/14/1999 | US5953278 Data sequencing and registering in a four bit pre-fetch SDRAM |
| 09/14/1999 | US5953277 Reference potential generator and a semiconductor memory device having the same |
| 09/14/1999 | US5953275 Semiconductor memory device having sense amplifiers shared between open bit line less affected by adjacent ones |
| 09/14/1999 | US5953274 Semiconductor memory device capable of storing plural-bit data in a single memory cell |
| 09/14/1999 | US5953271 Semiconductor memory device allowing acceleration testing, and a semi-finished product for an integrated semiconductor device that allows acceleration testing |
| 09/14/1999 | US5953266 Device and method for repairing a memory array by storing each bit in multiple memory cells in the array |
| 09/14/1999 | US5953262 Output circuit of a semiconductor memory device for providing an intermediate potential to an output terminal |
| 09/14/1999 | US5953261 Semiconductor memory device having data input/output circuit of small occupied area capable of high-speed data input/output |
| 09/14/1999 | US5953259 Integrated circuit memory devices having cross-coupled isolation gate controllers which provide simultaneous reading and writing capability to multiple memory arrays |
| 09/14/1999 | US5953257 Semiconductor memory device accessible at high speed |
| 09/14/1999 | US5953255 Low voltage, low current hot-hole injection erase and hot-electron programmable flash memory with enhanced endurance |
| 09/14/1999 | US5953252 High read speed multivalued read only memory device |
| 09/14/1999 | US5953250 Flash memory array and decoding architecture |
| 09/14/1999 | US5953249 Memory cell having negative differential resistance devices |
| 09/14/1999 | US5953248 Low switching field magnetic tunneling junction for high density arrays |
| 09/14/1999 | US5953247 Semiconductor device |
| 09/14/1999 | US5953246 Semiconductor memory device such as a DRAM capable of holding data without refresh |
| 09/14/1999 | US5953245 Semiconductor memory device and method of controlling imprint condition thereof |
| 09/14/1999 | US5953242 System with meshed power and signal buses on cell array |
| 09/14/1999 | US5952857 Semiconductor integrated circuit achieving reliable data latching |
| 09/14/1999 | US5951692 Single-chip memory system having a redundancy judging circuit |
| 09/10/1999 | WO1999045593A1 Three-dimensional device |
| 09/10/1999 | WO1999044752A2 Circuit and method for specifying performance parameters in integrated circuits |
| 09/09/1999 | DE19909092A1 Semiconductor memory with low energy requirement |
| 09/08/1999 | EP0940850A1 Signaling improvement using extended transmission lines on 'DIMM'memory modules |
| 09/08/1999 | EP0940817A2 Improved dynamic access memory delay circuits and methods therefor |
| 09/08/1999 | EP0940752A1 Method for error correction in a multilevel semiconductor memory |
| 09/08/1999 | CN1228191A Memory integrated circuit device with structure compatible with logic |
| 09/08/1999 | CN1228170A Optical logic element and optical logic device |
| 09/08/1999 | CN1227954A Write driver and bit line precharging apparatus and method |
| 09/07/1999 | US5950224 Electrically modifiable non-volatile memory circuit having means for autonomous refreshing dependent upon on periodic clock pulses |
| 09/07/1999 | US5950219 Memory banks with pipelined addressing and priority acknowledging and systems and methods using the same |
| 09/07/1999 | US5949736 Memory control circuit reducing a consumed power of memory |
| 09/07/1999 | US5949735 Row decoder for semiconductor memory device |
| 09/07/1999 | US5949734 Semiconductor memory device |
| 09/07/1999 | US5949733 Semiconductor memory, moving-picture storing memory, moving-picture storing apparatus, moving-picture displaying apparatus, static-picture storing memory, and electronic notebook |
| 09/07/1999 | US5949732 Method of structuring a multi-bank DRAM into a hierarchical column select line architecture |
| 09/07/1999 | US5949731 Semiconductor memory device having burn-in mode operation stably accelerated |
| 09/07/1999 | US5949730 Method and apparatus for quickly restoring digit I/O lines |
| 09/07/1999 | US5949729 Semiconductor memory device |
| 09/07/1999 | US5949724 Burn-in stress circuit for semiconductor memory device |
| 09/07/1999 | US5949723 Fast single ended sensing with configurable half-latch |
| 09/07/1999 | US5949722 I/O bias circuit insensitive to inadvertent power supply variations for MOS memory |
| 09/07/1999 | US5949721 Data output related circuit which is suitable for semiconductor memory device for high -speed operation |
| 09/07/1999 | US5949720 Integrated circuit chip |
| 09/07/1999 | US5949711 Dual bit memory cell |
| 09/07/1999 | US5949709 Electrically programmable memory, method of programming and method of reading |
| 09/07/1999 | US5949707 Giant magnetoresistive effect memory cell |
| 09/07/1999 | US5949706 Static random access memory cell having a thin film transistor (TFT) pass gate connection to a bit line |
| 09/07/1999 | US5949705 DRAM cell, DRAM and method for fabricating the same |
| 09/07/1999 | US5949699 Semiconductor integrated circuit device |
| 09/07/1999 | US5949697 Semiconductor memory device having hierarchical input/output line structure and method for arranging the same |
| 09/07/1999 | US5949270 Circuit and method of compensating for threshold value of transistor used in semiconductor circuit |
| 09/07/1999 | US5949260 Clock signal processing circuit and semiconductor device in which a clock signal is processed in improved method |
| 09/07/1999 | US5949256 Asymmetric sense amplifier for single-ended memory arrays |
| 09/07/1999 | US5949254 Adjustable output driver circuit |
| 09/07/1999 | US5949252 Bus configuration and input/output buffer |
| 09/01/1999 | EP0939407A2 Compact, low voltage, noise-immune memory cell |
| 09/01/1999 | EP0938731A1 Memory element with energy control mechanism |
| 09/01/1999 | EP0850479B1 Interlaced layout configuration for differential pairs of interconnect lines |
| 09/01/1999 | EP0847582A4 Memory system having programmable control parameters |
| 09/01/1999 | CN1227388A Semiconductor memory device |
| 09/01/1999 | CN1227357A Method of controlling clock signal and circuit for controlling clock signal |
| 08/31/1999 | US5946565 Semiconductor integrated circuit device and process for manufacturing the same |
| 08/31/1999 | US5946269 Synchronous RAM controlling device and method |
| 08/31/1999 | US5946268 Internal clock signal generation circuit including delay line, and synchronous type semiconductor memory device including internal clock signal |
| 08/31/1999 | US5946266 Synchronous semiconductor memory device capable of reducing delay time at data input/output line upon data input |
| 08/31/1999 | US5946264 Method and structure for enhancing the access time of integrated circuit memory devices |
| 08/31/1999 | US5946263 Memory device having separate driver sections |
| 08/31/1999 | US5946262 RAM having multiple ports sharing common memory locations |
| 08/31/1999 | US5946261 Dual-port memory |
| 08/31/1999 | US5946260 Method and system for storing and processing multiple memory addresses |
| 08/31/1999 | US5946259 Voltage generator methods and apparatus |
| 08/31/1999 | US5946257 Memory device |
| 08/31/1999 | US5946256 Semiconductor memory having data transfer between RAM array and SAM array |
| 08/31/1999 | US5946254 Semiconductor memory device of hierarchical bit-line architecture using crosspoint-type memory cell |
| 08/31/1999 | US5946253 Semiconductor memory device |
| 08/31/1999 | US5946252 Semiconductor memory device having improved manner of data line connection in hierarchical data line structure |
| 08/31/1999 | US5946251 Bit line equalize circuit of semiconductor memory device |
| 08/31/1999 | US5946245 Memory array test circuit and method |
| 08/31/1999 | US5946243 Integrated circuit |
| 08/31/1999 | US5946242 Internal source voltage generator for a semiconductor memory device |
| 08/31/1999 | US5946231 Non-volatile semiconductor memory device |
| 08/31/1999 | US5946228 Limiting magnetic writing fields to a preferred portion of a changeable magnetic region in magnetic devices |
| 08/31/1999 | US5946227 Magnetoresistive random access memory with shared word and digit lines |
| 08/31/1999 | US5946225 SRAM device having negative voltage generator for performing stable data latch operation |
| 08/31/1999 | US5946224 Ferroelectric memory device, a method for read out stored data and a method for standing-by |
| 08/31/1999 | US5945861 Clock signal modeling circuit with negative delay |
| 08/31/1999 | US5945846 Clock driver circuit in a centrally located macro cell layout region |
| 08/31/1999 | US5945706 Memory device |
| 08/26/1999 | WO1999043003A1 Multi-level data through a single input/output pin |
| 08/26/1999 | DE19904786A1 Read only memory (ROM) |
| 08/25/1999 | EP0938097A2 Memory reading circuit and SRAM |
| 08/25/1999 | EP0938096A2 Ferroelectric memory device |
| 08/25/1999 | EP0937302A1 Spin dependent tunneling memory |
| 08/25/1999 | EP0618535B1 EEPROM card with defective cell substitution and cache memory |
| 08/24/1999 | US5943292 Address counter circuit and semiconductor memory device |
| 08/24/1999 | US5943289 Hierarchical word line structure |
| 08/24/1999 | US5943288 Apparatus and method for minimizing address hold time in asynchronous SRAM |
| 08/24/1999 | US5943286 Memory device having a plurality of cell array blocks including reference cells are connected in series |