| Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008) |
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| 02/01/2005 | US6848780 Printing mechanism for a wide format pagewidth inkjet printer |
| 02/01/2005 | CA2468057A1 Sparse caching for streaming media |
| 01/27/2005 | WO2005008736A2 1t1c sram |
| 01/27/2005 | WO2005008675A1 Compensating a long read time of a memory device in data comparison and write operations |
| 01/27/2005 | WO2005008674A2 Semiconductor memory having a short effective word-line cycle time and data readout method for said semi-conductor memory |
| 01/27/2005 | WO2005008673A1 Data strobe synchronization circuit and method for double data rate, multi-bit writes |
| 01/27/2005 | WO2005008672A2 Asynchronous static random access memory |
| 01/27/2005 | WO2004109708A3 Nanoelectromechanical memory cells and data storage devices |
| 01/27/2005 | WO2004095515A3 Methods for contracting conducting layers overlying magnetoelectronic elements of mram devices |
| 01/27/2005 | WO2004032146A3 Programmable magnetic memory device fp-mram |
| 01/27/2005 | US20050020011 Magnetic memory device and method of manufacturing the same |
| 01/27/2005 | US20050019972 Fabrication method of semiconductor device |
| 01/27/2005 | US20050018529 Fully hidden refresh dynamic random access memory |
| 01/27/2005 | US20050018528 Memory arrangement for processing data, and method |
| 01/27/2005 | US20050018527 Non-volatile memory control |
| 01/27/2005 | US20050018523 Dynamic memory word line driver scheme |
| 01/27/2005 | US20050018521 Methods and devices for accessing a memory using multiple separate address mapped temporary storage areas |
| 01/27/2005 | US20050018520 Circuit for reducing standby leakage in a memory unit |
| 01/27/2005 | US20050018519 Semiconductor memory device capable of reducing power consumption during reading and standby |
| 01/27/2005 | US20050018516 Discharge of conductive array lines in fast memory |
| 01/27/2005 | US20050018513 Temperature detection circuit and temperature detection method |
| 01/27/2005 | US20050018512 Integrated charge sensing scheme for resistive memories |
| 01/27/2005 | US20050018511 Semiconductor memory device which selectively controls a local input/output line sense amplifier |
| 01/27/2005 | US20050018509 Complementary bit resistance memory sensor and method of operation |
| 01/27/2005 | US20050018508 Embedded ROM device using substrate leakage |
| 01/27/2005 | US20050018507 Circuit and method for controlling an access to an integrated memory |
| 01/27/2005 | US20050018506 Sense amp equilibration device |
| 01/27/2005 | US20050018504 Array of non volatile split-gate memory cells for avoiding parasitic programming and programming method thereof |
| 01/27/2005 | US20050018501 Natural analog or multilevel transistor DRAM-cell |
| 01/27/2005 | US20050018493 Programmable conductor random access memory and method for sensing same |
| 01/27/2005 | US20050018492 Packet buffer circuit and method |
| 01/27/2005 | US20050018489 Non-volatile semiconductor memory device and electric device with the same |
| 01/27/2005 | US20050018488 Flash memory device having multi-level cell and reading and programming method thereof |
| 01/27/2005 | US20050018482 Techniques for reducing effects of coupling between storage elements of adjacent rows of memory cells |
| 01/27/2005 | US20050018481 Novel multi-state memory |
| 01/27/2005 | US20050018479 Magnetic storage cell and magnetic memory device using same |
| 01/27/2005 | US20050018478 Magnetic random access memory device having thermal agitation property and high write efficiency |
| 01/27/2005 | US20050018477 Method and apparatus sensing a resistive memory with reduced power consumption |
| 01/27/2005 | US20050018476 Magnetoresistive element, magnetic memory cell, and magnetic memory device, and method for manufacturing the same |
| 01/27/2005 | US20050018475 Magnetic memory structure |
| 01/27/2005 | US20050018474 SRAM cell structure and circuits |
| 01/27/2005 | US20050018471 Semiconductor memory device |
| 01/27/2005 | US20050018470 Semiconductor memory devices for outputting bit cell data without separate reference voltage generator and related methods of outputting bit cell data |
| 01/27/2005 | US20050018469 Array transistor amplification method and apparatus for dynamic random access memory |
| 01/27/2005 | US20050018468 Ferroelectric memory |
| 01/27/2005 | US20050018466 Embedded ROM device using substrate leakage |
| 01/27/2005 | US20050018464 High speed data bus |
| 01/27/2005 | US20050018461 Semiconductor integrated circuit device, method of testing semiconductor integrated circuit device and method of manufacturing semiconductor integrated circuit device |
| 01/27/2005 | US20050018017 Inkjet nozzle chamber holding two fluids |
| 01/27/2005 | US20050018015 Inkjet nozzle with resiliently biased ejection actuator |
| 01/27/2005 | US20050018004 Print engine controller for high volume pagewidth printing |
| 01/27/2005 | US20050017979 Non-volatile memory parallel processor |
| 01/27/2005 | US20050017370 Memory device having a semiconducting polymer film |
| 01/27/2005 | US20050017234 Nanoscale wire-based sublithographic programmable logic arrays |
| 01/27/2005 | US20050016957 Dry etching method for magnetic material |
| 01/27/2005 | DE10340588A1 Delay Locked Loop und Verfahren zum Treiben derselben Delay locked loop and method of driving the same |
| 01/27/2005 | DE10329370B3 Circuit for refreshing memory cells in a dynamic memory has a refresh control circuit, a memory circuit, a setting circuit and a reset circuit |
| 01/27/2005 | DE102004031959A1 Dynamic random access memory device, has read protection unit that supplies reset voltage that is higher than back-bias voltage to well region in response to externally supplied reset command |
| 01/27/2005 | DE102004028808A1 Speichersystem, das mit einem externen Speichersystem verbunden ist und Verfahren zum Verbinden derartiger Systeme Memory system that is connected to an external storage system and method for connecting such systems |
| 01/27/2005 | DE102004019230A1 FeRAM memory device FeRAM memory device |
| 01/27/2005 | DE102004008240A1 Verfahren und Vorrichtungen zum Bestimmen des Zustands eines Speicherelements Methods and apparatus for determining the state of a memory element |
| 01/27/2005 | DE102004008218A1 Wiedergewinnen von in einem integrierten Magnetspeicher gespeicherten Daten Retrieving data stored in an integrated magnetic memory data |
| 01/27/2005 | DE102004008217A1 Schnittstellen für einen nicht-flüchtigen gepufferten Speicher Interfaces for a non-volatile buffer memory |
| 01/27/2005 | CA2532464A1 1t1c sram |
| 01/26/2005 | EP1501099A1 Non volatile memory array with split gate cells and method for avoiding disturbance when programming |
| 01/26/2005 | EP1501098A2 A memory |
| 01/26/2005 | EP1501097A2 Memory circuit, display device and electronic equipment each comprising the same |
| 01/26/2005 | EP1501020A1 A non-volatile memory parallel processor |
| 01/26/2005 | EP1500720A1 Dry etching method for magnetic material |
| 01/26/2005 | EP1500116A1 Method of forming mram devices |
| 01/26/2005 | EP1500111A2 Flexible redundancy for memories |
| 01/26/2005 | EP1500110A1 Molecular wire crossbar flash memory |
| 01/26/2005 | EP1500109A1 Redundancy in chained memory architectures |
| 01/26/2005 | EP1500108A2 Semiconductor memory device and operating method for a semiconductor memory device |
| 01/26/2005 | EP1500107A2 Method of performing access to a single-port memory device, memory access device, integrated circuit device and method of use of an integrated circuit device |
| 01/26/2005 | EP1299885B1 Addressing of memory matrix |
| 01/26/2005 | EP1143256B1 Test device for the functional testing of a semiconductor chip |
| 01/26/2005 | EP0920699B1 Antifuse detect circuit |
| 01/26/2005 | CN1572002A Noise suppression for open bit line DRAM architectures |
| 01/26/2005 | CN1572001A Magneto-resistive bit structure and method of manufacturing therefor |
| 01/26/2005 | CN1571278A Apparatus for reference voltage of logic electronic system and method thereof |
| 01/26/2005 | CN1571068A 半导体存储装置 The semiconductor memory device |
| 01/26/2005 | CN1571067A Ferroelectric memory |
| 01/26/2005 | CN1571066A Method of providing stability of a magnetic memory cell |
| 01/26/2005 | CN1186820C 半导体存储阵列及其制造方法 The semiconductor memory array and method of manufacturing |
| 01/26/2005 | CN1186799C Shared bit line cross point storage array |
| 01/26/2005 | CN1186781C Stable magnetic memory unit |
| 01/26/2005 | CN1186780C Film magnet memory capable of fast and stable reading data |
| 01/26/2005 | CN1186725C Column redundancy circuit with reduced signal path delay |
| 01/25/2005 | US6848071 Method and apparatus for updating an error-correcting code during a partial line store |
| 01/25/2005 | US6848067 Multi-port scan chain register apparatus and method |
| 01/25/2005 | US6848040 Column address path circuit and method for memory devices having a burst access mode |
| 01/25/2005 | US6848035 Semiconductor device with multi-bank DRAM and cache memory |
| 01/25/2005 | US6847583 Method of synchronizing read timing in a high speed memory system |
| 01/25/2005 | US6847580 Method of controlling data reading capable of increasing data transfer rate in SDRAM of the posted CAS standard |
| 01/25/2005 | US6847579 Semiconductor memory device |
| 01/25/2005 | US6847578 Semiconductor integrated circuit and data processing system |
| 01/25/2005 | US6847577 Semiconductor memory with inter-block bit wires and inter-block ground wires |
| 01/25/2005 | US6847575 Semiconductor device including multi-chip |
| 01/25/2005 | US6847573 Synchronous SRAM-compatible memory device including DRAM array with internal refresh |