Patents
Patents for G06F 5 - Methods or arrangements for data conversion without changing the order or content of the data handled (8,116)
11/1988
11/09/1988EP0290172A2 Bidirectional fifo with variable byte boundary and data path width change
11/08/1988US4783643 Impedance transforming circuit for multibit parallel digital circuits
11/03/1988WO1988008606A1 Method and apparatus for data transfer
11/02/1988EP0288860A2 Fast flush for a first-in first-out memory
11/01/1988US4782457 Barrel shifter using bit reversers and having automatic normalization
10/1988
10/25/1988US4780815 Memory control method and apparatus
10/19/1988EP0286719A2 Text compression and expansion method and apparatus
10/18/1988US4779234 First-in-first-out memory capable of simultaneous readings and writing operations
09/1988
09/28/1988EP0283735A2 Adaptive data compression method and apparatus
09/27/1988US4774686 Serial digital signal processing circuitry
09/22/1988WO1988007297A1 Asynchronous time division communication system
09/21/1988EP0283350A1 Broad-band host, particularly for the transmission of music or images
09/20/1988US4773033 Binary data identification circuit
09/13/1988US4771402 Address comparator
09/06/1988US4769769 Communication system including a first-in-first-out buffer
09/06/1988CA1241760A1 File compressor
07/1988
07/28/1988WO1988003679A3 Data buffer/switch
07/20/1988EP0274703A2 Method and apparatus for data intermediate storage
07/19/1988US4759041 Local area network control system synchronization with phase-lock loop
07/19/1988US4758975 Data processor capable of processing floating point data with exponent part of fixed or variable length
07/19/1988US4758973 Apparatus for processing floating-point data having exponents of a variable length
07/12/1988US4757469 Method of addressing a random access memory as a delay line, and signal processing device including such a delay line
07/12/1988US4757440 Pipelined data stack with access through-checking
07/06/1988EP0273083A1 Non-locking queueing mechanism
07/05/1988US4755971 Buffer memory for an input line of a digital interface
06/1988
06/29/1988EP0272869A2 Dual port type semiconductor memory device realizing a high speed read operation
06/29/1988EP0272847A2 Bidirectional semiconductor device having only one one-directional device
06/14/1988US4751740 Apparatus, method, and structure for translating a document having one structure into a document having another structure
06/14/1988US4751671 Size configurable data storage system
06/14/1988US4751665 For calculating sums of floating point summands
06/07/1988US4750154 Memory alignment system and method
06/07/1988US4750149 Programmable FIFO buffer
05/1988
05/31/1988US4748588 Fast data synchronizer
05/31/1988CA1237525A1 Queue administration method and apparatus
05/25/1988EP0267974A1 Control interface for transferring data between a data processing unit and input/output devices
05/19/1988WO1988003681A1 Pipeline control system
05/19/1988WO1988003679A2 Data buffer/switch
05/04/1988EP0266049A2 Coding system for reducing redundancy
04/1988
04/20/1988EP0264130A2 Barrel shifter
04/19/1988US4739308 Method for the formatting and unformatting of data resulting from the encoding of digital information using a variable length code and a device for using this method
04/12/1988US4737908 Buffer memory control system
04/06/1988EP0262636A2 Circuit arrangement for selecting and/or aligning data units in data processors
04/06/1988EP0262468A2 Reconfigurable fifo memory device
03/1988
03/29/1988US4734850 Data process system including plural storage means each capable of concurrent and intermediate reading and writing of a set of data signals
03/29/1988CA1234633A1 Compression of data for storage
03/24/1988WO1988002144A1 Arrangement for data compression
03/23/1988EP0260897A2 First-in-first-out memory system
03/23/1988EP0260862A2 Move-out queue buffer
03/23/1988EP0260411A2 Direct-injection fifo shift register
03/16/1988CN85107067B Circuit for converting integer into residue code block
03/08/1988CA1233905A1 Decimal digit processing apparatus and method
03/02/1988EP0258062A2 Digital data buffer and variable shift register
01/1988
01/27/1988EP0254123A1 Queue-memory
01/26/1988US4722067 Method and apparatus for implementing modulo arithmetic calculations
01/14/1988DE3718469A1 Synchronous FIFO register
01/13/1988EP0063144B1 Method and apparatus for bufferring data
01/12/1988US4719450 Method and system for binary-to-decimal interconversion
01/12/1988CA1231463A1 Memory access control apparatus
01/07/1988EP0251588A2 Bit interleaved multiplexer system providing byte synchronization for communicating apparatuses
01/07/1988EP0251151A2 Programmable fifo buffer
01/05/1988US4718074 Dejitterizer method and apparatus
12/1987
12/08/1987US4712090 Data control circuits
12/02/1987EP0247317A2 Apparatus and method for efficiently transferring data between a high speed channel and a low speed I/O device
12/01/1987US4710966 Digital frame processor pipe line circuit
12/01/1987US4710920 Bit interleaved multiplexer system providing byte synchronization for communicating apparatuses
11/1987
11/25/1987EP0246767A2 Semiconductor memories
11/10/1987US4706265 Code converting system and method for band compression of digital signals
11/10/1987CA1229177A1 Word length converter
11/04/1987EP0243528A1 Serial FIFO memory
11/04/1987CN87103783A 半导体存储器 Semiconductor memory
10/1987
10/29/1987DE3613896A1 Device and method for input and output of binary data, particularly test data of digital test items
10/28/1987EP0242961A1 Control method and means
10/20/1987US4701746 Device for converting code signals of one bit number into a code signal of a smaller bit number
10/14/1987EP0241129A2 Addressing arrangement for a RAM buffer controller
10/14/1987EP0240749A2 Disk controller bus interface
10/08/1987WO1987006085A1 Dejitterizer method and apparatus
10/07/1987EP0239737A2 Systolic super summation device
10/06/1987US4698672 Coding system for reducing redundancy
09/1987
09/30/1987EP0116047B1 Multiplexed first-in, first-out queues
09/23/1987EP0238300A2 Serial digital signal processing circuitry
09/16/1987EP0237030A2 Semiconductor memory having high-speed serial access scheme
09/16/1987EP0236615A2 Functional units for computers
09/15/1987US4694426 Asynchronous FIFO status circuit
09/08/1987US4692896 Method of processing a plurality of code systems
09/08/1987US4692894 Overflow/Underflow detection for elastic buffer
09/08/1987US4692893 Buffer system using parity checking of address counter bit for detection of read/write failures
09/02/1987EP0234187A2 Programmably controlled shifting mechanism in a programmable unit having variable data path widths
09/01/1987CA1226369A1 Method and apparatus for data compression
08/1987
08/26/1987EP0233635A2 Variable shift-count bidirectional shift control circuit
08/19/1987EP0233096A1 Process for formatisation and deformatisation of data resulting from the coding of numerical information using a variable-length code, and arrangement for carrying out this process
08/18/1987US4688220 Distribution of a data stream in a series-parallel-series digital arrangement comprising digital units having at least one defective element
08/12/1987CN86107983A Block shifter for graphics processor
07/1987
07/21/1987US4682284 Queue administration method and apparatus
07/15/1987EP0228948A1 Circuit for shifting one N-bit word or k words of N/k bits, k being an integer
07/07/1987CA1223971A1 High speed barrel shifter
07/07/1987CA1223965A1 High speed data compression and decompression apparatus and method
07/01/1987EP0227145A1 Supervision circuit for a non-encoded binary bit stream
06/1987
06/24/1987EP0226017A2 Data synchronizer between a source system and a sink system
06/16/1987US4674032 High-performance pipelined stack with over-write protection
06/10/1987CN86106497A Management of sound buffer
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