Patents
Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996)
02/2004
02/03/2004US6686778 High voltage tolerant differential input receiver
02/03/2004US6686776 Digital data coincidence determining circuit
02/03/2004US6686774 System and method for a high speed, bi-directional, zero turnaround time, pseudo differential bus capable of supporting arbitrary number of drivers and receivers
02/03/2004US6686773 Reducing short circuit power in CMOS inverter circuits
02/03/2004US6686771 Full-range extended voltage amplifier
02/03/2004US6686770 Tristate circuit for power up conditions
02/03/2004US6686768 Electrically-programmable interconnect architecture for easily-configurable stacked circuit arrangements
02/03/2004US6686765 GTL+ driver
02/03/2004US6686763 Near-zero propagation-delay active-terminator using transmission gate
02/03/2004US6686253 Method for design and manufacture of semiconductors
01/2004
01/29/2004WO2004010582A1 Probabilistic calculation element, drive method thereof, and recognition device using the same
01/29/2004WO2004010581A1 Interconnect structure for electrical devices
01/29/2004WO2004010578A2 Level shifting and level-shifting amplifier circuits
01/29/2004WO2003055069A3 Ecl to cmos level converter
01/29/2004US20040019704 Multiple processor integrated circuit having configurable packet-based interfaces
01/29/2004US20040019618 Interface method and device having interface for circuit comprising logical operation element
01/29/2004US20040017724 Semiconductor processing device
01/29/2004US20040017711 Self reverse bias low-power high-performance storage circuitry and related methods
01/29/2004US20040017248 Semiconductor integrated circuit device enabling to produce a stable constant current even on a low power-source voltage
01/29/2004US20040017238 Data output circuit for reducing skew of data signal
01/29/2004US20040017233 Single-event upset immune frequency divider circuit
01/29/2004US20040017230 Sub-micron high input voltage tolerant input output (I/O) circuit
01/29/2004US20040017229 Sub-micron high input voltage tolerant input output (I/O) circuit
01/29/2004US20040017228 CMOS comparator output stage and method
01/29/2004US20040017226 Cmos comparator output stage and method
01/29/2004US20040017223 High speed differential signaling logic gate and applications thereof
01/29/2004US20040017222 Heterogeneous interconnection architecture for programmable logic devices
01/29/2004US20040017221 Field programmable device
01/29/2004US20040017220 Dynamic current calibrated driver circuit
01/29/2004US20040016977 Semiconductor integrated circuit device
01/29/2004DE10231433A1 Schaltungsanordnung zur Steuerung lastabhängiger Treiberstärken Circuitry for controlling load-dependent drive strengths
01/29/2004DE10135786B4 Ausgangstreibervorrichtung und Verfahren zur Ausgabe eines Ausgangssignals hieraus Output driver device and method for outputting an output signal therefrom
01/28/2004EP1385075A2 Semiconductor integrated circuit device
01/28/2004EP1384324A1 A cmos circuit with constant output swing and variable time delay for a voltage controlled oscillator
01/28/2004CN1471759A Switching aid circuit for a logic circuit
01/28/2004CN1471731A Nanoelectronic devices
01/28/2004CN1471668A Asynchronous pipeline with latch controllers
01/28/2004CN1471153A Integrated circuit, ssytem development method, and data processing method
01/28/2004CN1136657C Level shift circuit having plural level shift stages
01/27/2004US6684343 Managing operations of a computer system having a plurality of partitions
01/27/2004US6684263 Apparatus and method for topography dependent signaling
01/27/2004US6683932 Single-event upset immune frequency divider circuit
01/27/2004US6683491 Semiconductor integrated circuit
01/27/2004US6683486 Low voltage shifter with latching function
01/27/2004US6683485 Double translation voltage level shifter and method
01/27/2004US6683482 Slew rate control of output drivers using PVT controlled edge rates and delays
01/27/2004US6683477 Memory cell
01/27/2004US6683475 High speed digital signal buffer and method
01/27/2004US6683474 Method and apparatus for communication using a distributed multiplexed bus
01/27/2004US6683473 Input termination with high impedance at power off
01/27/2004US6683472 Method and apparatus for selectably providing single-ended and differential signaling with controllable impedance and transition time
01/22/2004WO2004008641A1 Electronic circuit with array of programmable logic cells
01/22/2004WO2003075460A3 Low power dynamic logic gate with full voltage swing operation
01/22/2004US20040015528 Programmable logic devices with function-specific blocks
01/22/2004US20040014268 Semiconductor integrated circuit device having body biasing circuit for generating forward well bias voltage of suitable level by using simple circuitry
01/22/2004US20040013021 Bus interface circuit and receiver circuit
01/22/2004US20040013015 Semiconductor integrated circuit
01/22/2004US20040012492 Apparatus and method for reducing electromigration
01/22/2004US20040012438 Circuit configuration for controlling load-dependent driver strengths
01/22/2004US20040012418 Power-up circuit
01/22/2004US20040012413 Quad state logic design methods, circuits, and systems
01/22/2004US20040012412 Buffer circuit, buffer tree, and semiconductor device
01/22/2004US20040012410 Level shifting and level-shifting amplifier circuits
01/22/2004US20040012409 Full-range extended voltage amplifier
01/22/2004US20040012408 Ultra high speed flip-flop
01/22/2004US20040012397 Semiconductor integrated circuit apparatus
01/22/2004DE19900859B4 CMOS-Schaltung geringer Leistung CMOS circuit low power
01/21/2004EP1383240A2 Ultra high speed flip-flop
01/21/2004EP1382123A2 Digital to analog converter.
01/21/2004EP1382120A2 Fpga logic element with variable-length shift register capability
01/21/2004EP1382119A2 Output driver circuit with current detection
01/21/2004EP1382117A2 A field programmable gate array and microcontroller system-on-a-chip
01/21/2004CN1469548A Level transforming circuit for transforming signal logistic level
01/20/2004US6681378 Programming mode selection with JTAG circuits
01/20/2004US6680833 Input-output protection device for semiconductor integrated circuit
01/20/2004US6680638 High-speed discharge-suppressed D flip-flop
01/20/2004US6680629 5 V tolerant hot carrier injection (HCI) protection circuit
01/20/2004US6680625 Symmetrical CML logic gate system
01/20/2004US6680624 Block symmetrization in a field programmable gate array
01/15/2004WO2004006435A1 Semiconductor integrated circuit device and semiconductor system using the same
01/15/2004WO2004006265A1 A method and a unit for programming a memory
01/15/2004US20040010767 Hierarchical general interconnect architecture for high density fpga's
01/15/2004US20040010726 Inter-block interface circuit and system LSI
01/15/2004US20040008193 Sequential pulse train generator
01/15/2004US20040008073 Output circuit, input circuit, electronic circuit, multiplexer, demultiplexer, wired-or circuit, wired-and circuit, pulse-processing circuit, multiphase-clock processing circuit, and clock-multiplier circuit
01/15/2004US20040008058 Impedance comparison integrator circuit
01/15/2004US20040008057 Dynamic circuit
01/15/2004US20040008056 Dual threshold voltage and low swing domino logic circuits
01/15/2004US20040008055 Programmable logic devices providing reduced power consumption
01/15/2004US20040008054 Asymmetric bidirectional bus implemented using an I/O device with a digitally controlled impedance
01/15/2004US20040007743 Inverter, semiconductor logic circuit, static random access memory and data latch circuit
01/15/2004US20040007712 Five volt tolerant input scheme using a switched CMOS pass gate
01/15/2004DE10227618A1 Logikschaltung Logic circuit
01/14/2004CN1467915A High voltage tolerant output register
01/14/2004CN1467914A Current switching circuit
01/14/2004CN1467913A Differential high speed cmos to ecl logic converter
01/14/2004CN1467844A 半导体集成电路器件 The semiconductor integrated circuit device
01/14/2004CN1467841A Carbon nanometer tube half adder and process for making the same
01/13/2004US6678646 Method for implementing a physical design for a dynamically reconfigurable logic circuit
01/13/2004US6677802 Method and apparatus for biasing body voltages