| Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996) |
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| 12/30/2003 | US6670679 Semiconductor device having an ESD protective circuit |
| 12/30/2003 | US6670659 Ferroelectric data processing device |
| 12/30/2003 | CA2345570C Programmable circuit with preview function |
| 12/25/2003 | WO2003107395A2 Protected dual-voltage microcircuit power arrangement |
| 12/25/2003 | US20030237071 PLD architecture for flexible placement of IP function blocks |
| 12/25/2003 | US20030237056 Low power buffer implementation |
| 12/25/2003 | US20030236931 Data transfer control circuitry including fifo buffers |
| 12/25/2003 | US20030235105 Semiconductor integrated circuit |
| 12/25/2003 | US20030234996 Circuit and method to match common mode flex impedance and to achieve symmetrical switching voltage outputs of write driver |
| 12/25/2003 | US20030234675 Limiting amplifier with a power detection circuit |
| 12/25/2003 | US20030234671 Pulse generation circuit enabling its output pulse cycle to be shortened |
| 12/25/2003 | US20030234668 Differential high speed CMOS to ECL logic converter |
| 12/25/2003 | US20030234667 PLDs providing reduced delays in cascade chain circuits |
| 12/25/2003 | US20030234666 Logic array devices having complex macro-cell architecture and methods facilitating use of same |
| 12/25/2003 | US20030234664 Data bus |
| 12/25/2003 | US20030234663 Programmable line terminator |
| 12/25/2003 | US20030234662 Input circuit |
| 12/25/2003 | US20030234430 Method and apparatus to make a semiconductor chip susceptible to radiation failure |
| 12/25/2003 | US20030234427 Semiconductor device configured to allow well potential control in accordance with operation mode |
| 12/24/2003 | WO2003107152A2 Multiple supply voltage dynamic logic |
| 12/24/2003 | WO2003081833A3 Floating-gate analog circuit |
| 12/24/2003 | WO2003010631A9 Hierarchical multiplexer-based integrated circuit interconnect architecture for scalability and automatic generation |
| 12/24/2003 | CN2595080Y Photoelectric coupling unit for promoting inhibition ability of automatic apparatus to switching interfere |
| 12/24/2003 | CN1463078A Voltage inverter and semiconductor device |
| 12/24/2003 | CN1463077A Input/output buffer |
| 12/24/2003 | CN1463076A Correction circuit, delay circuit and annular oscillator circuit |
| 12/24/2003 | CN1463042A Electronic circuit device and electronic device package |
| 12/24/2003 | CN1132313C Over-sampling type clock recovery circuit with power consumption reduced and method of regulating clock signal phase position in it |
| 12/24/2003 | CN1132305C Input amplifier for input signal with steep-side |
| 12/24/2003 | CN1132247C Pull-up and pull-down circuit |
| 12/23/2003 | US6668357 Cold clock power reduction |
| 12/23/2003 | US6667648 Voltage island communications circuits |
| 12/23/2003 | US6667647 Low power clock distribution methodology |
| 12/23/2003 | US6667645 Pulsed clock signal transfer circuits with dynamic latching |
| 12/23/2003 | US6667641 Programmable phase shift circuitry |
| 12/23/2003 | US6667637 Dynamic logic circuit with beta controllable noise margin |
| 12/23/2003 | US6667636 DSP integrated with programmable logic based accelerators |
| 12/23/2003 | US6667635 FPGA lookup table with transmission gate structure for reliable low-voltage operation |
| 12/23/2003 | US6667633 Multiple finger off chip driver (OCD) with single level translator |
| 12/23/2003 | US6667520 SEU hard majority voter for triple redundancy |
| 12/18/2003 | WO2003105345A2 Programmable logic device having heterogeneous programmable logic blocks |
| 12/18/2003 | WO2003105230A1 Buffer, buffer operation and method of manufacture |
| 12/18/2003 | WO2003105227A2 Data carrier comprising an integrated circuit with an esd protection circuit |
| 12/18/2003 | WO2003105193A2 Low-leakage integrated circuits and dynamic logic circuits |
| 12/18/2003 | WO2003104949A2 Methods and apparatus for composing an identification number |
| 12/18/2003 | WO2003061122A3 Differential amplifier circuit for regenerating complementary digital signals |
| 12/18/2003 | WO2003043191A3 Lvds driver for small supply voltages |
| 12/18/2003 | WO2002080179A3 Digital leakage compensation circuit |
| 12/18/2003 | WO2002075926B1 Antifuse reroute of dies |
| 12/18/2003 | US20030233622 Method and apparatus for an asynchronous pulse logic circuit |
| 12/18/2003 | US20030231713 Complement reset buffer |
| 12/18/2003 | US20030231441 Protected dual-voltage microcircuit power arrangement |
| 12/18/2003 | US20030231046 High voltage level shifting IC with under-ground voltage swing withstanding capability |
| 12/18/2003 | US20030231044 Thin gate oxide output drive |
| 12/18/2003 | US20030231034 Driver circuit connected to pulse shaping circuitry and method of operating same |
| 12/18/2003 | US20030231033 Driver circuit connected to a switched capacitor and method of operating same |
| 12/18/2003 | US20030231031 Low-voltage current mode logic circuits and methods |
| 12/18/2003 | US20030231030 Virtual Ground Circuit |
| 12/17/2003 | EP1372156A2 Data output driver and data output method for minimizing data output time variations caused by data patterns |
| 12/17/2003 | EP1371199A2 Line driver with slew-rate control |
| 12/17/2003 | EP0960374B1 Internal bus system for dfps, building blocks with two dimensional or multidimensional programmable cell structures to handle large amounts of data involving high networking requirements |
| 12/17/2003 | EP0780037B1 A method for testing an electronic circuit by logically combining clock signals, and an electronic circuit provided with facilities for such testing |
| 12/17/2003 | CN1462507A 可重新配置的逻辑器件 Reconfigurable logic device |
| 12/16/2003 | US6665354 Differential input receiver and method for reducing noise |
| 12/16/2003 | US6664842 FET active load and current source |
| 12/16/2003 | US6664823 Inverter output circuit |
| 12/16/2003 | US6664821 Line driver with current source output and low sensitivity to load variations |
| 12/16/2003 | US6664815 Output driver circuit with current detection |
| 12/16/2003 | US6664814 Output driver for an integrated circuit |
| 12/16/2003 | US6664813 Pseudo-NMOS logic having a feedback controller |
| 12/16/2003 | US6664810 Multi-level programmable voltage control and output buffer with selectable operating voltage |
| 12/16/2003 | US6664809 Method and system for a CMOS level shifter circuit for converting a low voltage input to a very high-voltage output |
| 12/16/2003 | US6664807 Repeater for buffering a signal on a long data line of a programmable logic device |
| 12/16/2003 | US6664148 Integrated circuit device with switching between active mode and standby mode controlled by digital circuit |
| 12/11/2003 | WO2003103145A1 Output stage resistant against high voltage swings |
| 12/11/2003 | WO2003103144A1 Level shift circuit, display, and mobile terminal |
| 12/11/2003 | WO2003103015A2 Reconfigurable integrated circuit |
| 12/11/2003 | WO2003102960A1 Device for reducing the effects of leakage current within electronic devices |
| 12/11/2003 | WO2003102790A2 Input/output device having dynamic delay |
| 12/11/2003 | WO2003010785A3 Superconductive crossbar switch |
| 12/11/2003 | US20030229878 Process and system for repeater insertion in an IC design |
| 12/11/2003 | US20030229877 System and method for configuring analog elements in a configurable hardware device |
| 12/11/2003 | US20030229837 Method and apparatus for testing a logic cell in a semiconductor device |
| 12/11/2003 | US20030229836 Integrated circuit |
| 12/11/2003 | US20030229800 Methods and apparatus for composing an identification number |
| 12/11/2003 | US20030227807 Magnetic logic element and magnetic logic element array |
| 12/11/2003 | US20030227797 Data output driver and data output method for minimizing data output time variations caused by data patterns |
| 12/11/2003 | US20030227403 Size-reduced majority circuit |
| 12/11/2003 | US20030227320 Buffer, buffer operation and method of manufacture |
| 12/11/2003 | US20030227319 Current switching circuit |
| 12/11/2003 | US20030227316 Level conversion circuit converting logic level of signal |
| 12/11/2003 | US20030227315 Level shifting circuit |
| 12/11/2003 | US20030227314 Semiconductor device with interface circuitry having operating speed during low voltage mode improved |
| 12/11/2003 | US20030227304 Semiconductor integrated circuit device |
| 12/11/2003 | US20030227302 Low current wide VREF range input buffer |
| 12/11/2003 | US20030227298 Method and apparatus for low latency distribution of logic signals |
| 12/11/2003 | US20030227297 Output buffer circuit |
| 12/11/2003 | US20030227296 Skewed bus driving method and circuit |
| 12/11/2003 | US20030227295 Output buffer circuit for excessive voltage protection |
| 12/11/2003 | US20030227034 Buffer, buffer operation and method of manufacture |