Patents
Sitemap › H03 - Basic electronic circuitry › H03K - Pulse technique › H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996)
08/2003
08/05/2003US6603805 Transceiver circuit transmitting/receiving a tenary pulse signal
08/05/2003US6603345 Semiconductor device with reduced leakage of current
08/05/2003US6603334 Low-amplitude driver circuit
08/05/2003US6603333 Method and apparatus for reduction of noise sensitivity in dynamic logic circuits
08/05/2003US6603332 Configurable logic block for PLD with logic gate for combining output with another configurable logic block
08/05/2003US6603331 Low-voltage non-degenerative transmitter circuit
08/05/2003US6603328 Semiconductor integrated circuit
08/05/2003US6603217 Semiconductor circuit device having hierarchical power supply structure
08/05/2003US6603175 Operating circuit with voltage regular circuit having at least a partially depleted soi field effect transistor
07/2003
07/31/2003WO2003063356A1 Intergrated circuit and battery powered electronic device
07/31/2003WO2003021637A3 A high performance integrated circuit regulator with substrate transient suppression
07/31/2003US20030143964 Signal transmission system
07/31/2003US20030142550 Semiconductor device
07/31/2003US20030142240 Device and method for interfacing digital video processing devices
07/31/2003US20030142052 Drive circuit including a plurality of transistors characteristics of which are made to differ from one another, and a display apparatus including the drive circuit
07/31/2003US20030141926 Semiconductor integrated circuit device
07/31/2003US20030141905 Logical circuit and semiconductor device
07/31/2003US20030141904 Method and apparatus for communication using a distributed multiplexed bus
07/31/2003US20030141903 Clocked full-rail differential logic with sense amplifiers
07/31/2003US20030141902 Method for increasing the load capacity of full-rail differential logic
07/31/2003US20030141899 Low-to-high voltage conversion method and system
07/31/2003US20030141898 Programmable logic devices with function-specific blocks
07/31/2003US20030141897 Multi-access FIFO queue
07/31/2003US20030141896 Method and apparatus for low capacitance, high output impedance driver
07/31/2003US20030141895 Programmable termination for CML I/O
07/31/2003DE19880406C2 Integrierte CMOS-Schaltung CMOS integrated circuit
07/30/2003EP1331739A1 Low voltage CMOS level shifter
07/30/2003EP1331738A1 Binary decision diagram (BDD) adiabatic charging logic circuit
07/30/2003EP1331671A1 Point contact array, not circuit, and electronic circuit comprising the same
07/30/2003EP1330877A1 Switching aid circuit for a logic circuit
07/30/2003EP1330876A1 Electronic safety switching device
07/30/2003EP1330875A1 Digitally controlled impedance for i/o of an integrated circuit device
07/30/2003EP1330706A1 Asynchronous pipeline with latch controllers
07/30/2003CN2563842Y Not circuit structure
07/30/2003CN1433588A Mutli-voltage power-up stable input-output buffer circuit in disc drive
07/30/2003CN1433150A Method of reducing bounce in logic circuit
07/30/2003CN1433144A 电路 Circuit
07/30/2003CN1433076A 电平移动电路 Level shift circuit
07/30/2003CN1433027A Drive capacity setting method and program and its driver circuit
07/30/2003CN1116682C Data output buffer circuit of semiconductor memory device
07/29/2003US6600483 Driving circuit
07/29/2003US6600358 Elimination of current drain in step-up level shifter when low power domain is off
07/29/2003US6600348 Input/output device having dynamic delay
07/29/2003US6600341 Integrated circuit and associated design method using spare gate islands
07/29/2003US6600340 Noise tolerant wide-fanin domino circuits
07/29/2003US6600338 Apparatus and method for level-shifting input receiver circuit from high external voltage to low internal supply voltage
07/29/2003US6600337 Line segmentation in programmable logic devices having redundancy circuitry
07/29/2003US6600241 Method and apparatus for compensating for ionizing radiation induced threshold shift in metal oxide semiconductor field effect transistors
07/24/2003WO2003061128A1 Fpga and embedded circuitry initialization and processing
07/24/2003WO2003061127A1 Capacitively coupled re-referencing circuit with transient correction
07/24/2003WO2003061122A2 Differential amplifier circuit for regenerating complementary digital signals
07/24/2003WO2003060996A2 Adaptive threshold voltage control with positive body bias for n and p-channel transistors
07/24/2003US20030137881 Memory control circuit and control system
07/24/2003US20030137340 Semiconductor integrated circuit and a burn-in method thereof
07/24/2003US20030137337 Semiconductor integrated circuit and a burn-in method thereof
07/24/2003US20030137336 Level shift circuit for transmitting signal from leading edge to trailing edge of input signal
07/24/2003US20030137333 Multiphase-clock processing circuit and clock multiplying circuit
07/24/2003US20030137327 I/O buffer circuit
07/24/2003US20030137326 Output circuit
07/24/2003US20030137321 Logic circuit whose power switch is quickly turned on and off
07/24/2003US20030136967 High-isolation semiconductor device
07/24/2003CA2473734A1 Adaptive threshold voltage control with positive body bias for n and p-channel transistors
07/23/2003EP1330041A1 A method and an apparatus for improving the carriers' output power of a broadband multi-carrier base-station
07/23/2003EP1330033A2 Utilization of unused IO block for core logic functions
07/23/2003EP1330022A2 Electric circuit
07/23/2003EP1329816A2 Method for automatic dynamic unloading of data flow processors (dfp) as well as modules with bidimensional or multidimensional programmable cell structures (fpgas, dpgas or the like)
07/23/2003CN2562502Y Overvoltage protecting circuit with buffered output
07/23/2003CN1432211A Appts. and method for reducing electromigration
07/23/2003CN1432152A Circuits and methods for high-capacity asynchronous pipeline processing
07/23/2003CN1115817C Demodulation method and its device, receiving method and its device,and communication device
07/22/2003US6597630 Synchronous semiconductor memory device with NOEMI output buffer circuit
07/22/2003US6597617 Semiconductor device with reduced current consumption in standby state
07/22/2003US6597233 Differential SCSI driver rise time and amplitude control circuit
07/22/2003US6597229 Interface circuit and, electronic device and communication system provided with same
07/22/2003US6597222 Power down circuit for high output impedance state of I/O driver
07/22/2003US6597220 Semiconductor integrated circuit device and microcomputer
07/22/2003US6597203 CMOS gate array with vertical transistors
07/22/2003US6597202 Systems with skew control between clock and data signals
07/22/2003US6597198 Current mode bidirectional port with data channel used for synchronization
07/22/2003US6597196 Architecture and interconnect scheme for programmable logic circuits
07/17/2003WO2003059024A2 Circuits with improved power supply rejection
07/17/2003WO2003058429A2 Logic computing system and method
07/17/2003WO2001095552A3 High frequency network receiver
07/17/2003US20030135686 Internal bus system for DFPs and units with two- or multi-dimensional programmable cell architectures, for managing large volumes of data with a high interconnection complexity
07/17/2003US20030135332 Circuit and method for pipelined code sequence searching
07/17/2003US20030132976 Fail-safe circuit for dynamic smartpower integrated circuits
07/17/2003US20030132930 Electric circuit
07/17/2003US20030132821 Electronic device
07/17/2003US20030132794 Level conversion circuit
07/17/2003US20030132788 Output buffer circuit
07/17/2003US20030132782 Digital logic devices with extremely skewed trip points and reset circuitry for rapidly propagating signal edges
07/17/2003US20030132781 Driving circuit for transmission lines
07/17/2003US20030132778 Level shift circuit
07/17/2003US20030132735 Adaptive threshold voltage control with positive body bias for N and P-channel transistors
07/16/2003EP1327305A2 Dynamic swing voltage adjustment
07/16/2003EP1256075B1 Supporting multiple fpga configuration modes using dedicated on-chip processor
07/16/2003EP1190487A4 High voltage protection circuit on standard cmos process
07/16/2003EP1129520B1 Bus through termination circuit
07/16/2003CN1430742A Low power voltage regulator circuit for use in integrated circuit device
07/16/2003CN1430331A Computing circuit
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