Patents
Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996)
10/2003
10/21/2003US6636930 Turn architecture for routing resources in a field programmable gate array
10/21/2003US6636821 Output driver impedance calibration circuit
10/21/2003US6636089 Power supply detection device
10/21/2003US6636087 Spike current reducing circuit
10/21/2003US6636076 Quad state logic design methods, circuits, and systems
10/21/2003US6636073 Semiconductor integrated circuit
10/21/2003US6636071 Transmitting circuit, receiving circuit, transmitting-receiving circuit and electro-optical apparatus
10/21/2003US6636070 Driver circuitry for programmable logic devices with hierarchical interconnection resources
10/21/2003US6636069 Method and apparatus for compensated slew rate control of line termination
10/21/2003US6636066 Semiconductor integrated circuit and method for testing the same
10/21/2003US6635934 Semiconductor integrated circuit device operating with low power consumption
10/16/2003WO2003085409A1 Driver circuit employing high-speed tri-state for automatic test equipment
10/16/2003WO2003060996A3 Adaptive threshold voltage control with positive body bias for n and p-channel transistors
10/16/2003WO2003010891A3 Output driver equipped with a sensing resistor for measuring the current in the output driver
10/16/2003US20030196184 Turn architecture for routing resources in a field programmable gate array
10/16/2003US20030196144 Processor condition sensing circuits, systems and methods
10/16/2003US20030196140 Semiconductor integrated circuit
10/16/2003US20030193362 Level shifting circuit
10/16/2003US20030193355 Frequency divider system
10/16/2003US20030193352 Dynamic to Static converter with noise suppression
10/16/2003US20030193351 Output buffer circuit
10/16/2003US20030193350 Versatile RSDS-LVDS-miniLVDS-BLVDS differential signal interface circuit
10/16/2003US20030193349 Semiconductor integrated circuit
10/16/2003US20030193348 Level shifting circuit
10/16/2003US20030193084 Semiconductor integrated circuit
10/16/2003DE10217598C1 Circuit device with magnetoresistive circuit elements providing output signals of opposite sign in response to external magnetic field
10/16/2003DE10217593C1 Circuit device with magnetoresistive circuit elements providing output signals of opposite sign in response to external magnetic field
10/16/2003CA2480713A1 Driver circuit employing high-speed tri-state for automatic test equipment
10/15/2003EP1353484A2 Reconfigurable line driver
10/15/2003EP1353378A1 Alternating invertors for capacitive coupling reduction in transmission lines
10/15/2003EP1352474A2 Method for conditioning semiconductor-on-insulator transistors in programmable logic devices
10/15/2003EP1352472A1 Circuit for receiving and driving a clock-signal
10/15/2003EP1352462A1 Local supply generator for a digital cmos integrated circuit having an analog signal processing circuitry
10/15/2003EP0824791B1 Scalable multiple level interconnect architecture
10/15/2003EP0769223B1 Programmable switch for fpga input/output signals
10/15/2003CN2580687Y Novel integrated control switch
10/15/2003CN1449597A Buffer with compensating drive strength
10/15/2003CN1449114A Fast discrete Fourier transform and inverse transform digital-analog hybrid integrated circuit using prime factor algorithm
10/15/2003CN1449112A Semiconductor integrated circuit having leakage current cut-off circuit
10/15/2003CN1448946A Magnet logic element and magnet logic element array
10/15/2003CN1124690C Floor plan for scalable multiple level interconnect architecture
10/15/2003CN1124689C CMOS integrated circuit
10/15/2003CN1124687C Circuit device for producing digital signals
10/14/2003US6633992 Generalized pre-charge clock circuit for pulsed domino gates
10/14/2003US6633501 Integrated circuit and circuit configuration for supplying power to an integrated circuit
10/14/2003US6633469 Power semiconductor circuit
10/14/2003US6633196 Device and method for limiting the extent to which circuits in integrated circuit dice electrically load bond pads and other circuit nodes in the dice
10/14/2003US6633192 Level shift circuit and semiconductor device using the same
10/14/2003US6633191 Clock buffer with DC offset suppression
10/14/2003US6633183 Antifuse reroute of dies
10/14/2003US6633181 Multi-scale programmable array
10/14/2003US6633180 Methods of rerouting dies using antifuses
10/14/2003US6633179 Bidirectional signal control circuit
10/14/2003US6633178 Apparatus and method for power efficient line driver
10/09/2003WO2003084161A1 Driver driving method, driver circuit, transmission method using driver, and control circuit
10/09/2003WO2003084065A1 Integrated circuit, integrated circuit device, method for structuring integrated circuit device, and method for manufacturing integrated circuit device
10/09/2003WO2003083872A2 Low-power high-performance memory cell and related methods
10/09/2003WO2002093341A3 Method and apparatus for controlling current demand in an integrated circuit
10/09/2003WO2002029422A3 A scan test system and method for manipulating logic values that remain constant during normal operations
10/09/2003US20030191999 Integrated circuit that is robust against circuit errors
10/09/2003US20030189990 Tunable CMOS receiver apparatus
10/09/2003US20030189869 Semiconductor integrated circuit device having hierarchical power source arrangement
10/09/2003US20030189844 Circuit and method for data output in synchronous semiconductor device
10/09/2003US20030189477 Circuit configuration for converting logic signal levels
10/09/2003US20030189458 Differential termination resistor adjusting circuit
10/09/2003US20030189446 Output driver circuit for controlling up-slew rate and down-slew rate independently and up-driving strength and down-driving strength independently
10/09/2003US20030189445 Circuits and systems for limited switch dynamic logic
10/09/2003US20030189443 Versatile high voltage outputs using low voltage transistors
10/09/2003US20030189442 Semiconductor integrated circuit device having logic circuit
10/09/2003DE10162913C1 Integrierte Schaltung mit einem Anschlusspad zur Festlegung einer von mehreren Organisationsformen und Verfahren zu ihrem Betrieb (zB integrierte Speicherschaltung) Integrated circuit having a connection pad laying down one of several forms of organization and method for its operation (eg memory integrated circuit)
10/09/2003CA2480086A1 Data storage device
10/09/2003CA2479682A1 Low-power high-performance memory cell and related methods
10/08/2003EP1351394A1 A field programmable device
10/08/2003EP1351393A1 Device and method for adding and/or subtracting
10/08/2003EP1351392A1 Semiconductor integrated circuit device operating with low power consumption
10/08/2003EP1351065A1 A field programmable device
10/08/2003CN1447298A Shift register and display device using same
10/08/2003CN1123971C Multifunctional power supply controller
10/08/2003CN1123888C OCD with low output capacitance
10/07/2003US6631338 Dynamic current calibrated driver circuit
10/07/2003US6631090 Circuit and method for data output in synchronous semiconductor device
10/07/2003US6630964 Multi-standard channel decoder for real-time digital broadcast reception
10/07/2003US6630857 Semiconductor integrated circuit apparatus
10/07/2003US6630846 Modified charge recycling differential logic
10/07/2003US6630845 Semiconductor integrated circuit and communication device for logic input-state control during and following power-up
10/07/2003US6630844 Supply voltage detection circuit
10/07/2003US6630842 Routing architecture for a programmable logic device
10/07/2003US6630841 Configurable logic element with expander structures
10/07/2003US6630717 CMOS semiconductor circuit with reverse bias applied for reduced power consumption
10/07/2003US6630376 Body-tied-to-body SOI CMOS inverter circuit
10/02/2003WO2003081833A2 Floating-gate analog circuit
10/02/2003WO2003081671A2 Logic components from organic field effect transistors
10/02/2003WO2002039629A3 Channel time calibration means
10/02/2003US20030188287 Mask-programmable logic devices with programmable gate array sites
10/02/2003US20030188245 Sequential test pattern generation using clock-control design for testability structures
10/02/2003US20030188209 Control circuit, electronic circuit, and method of saving power
10/02/2003US20030187967 Method and apparatus to estimate downtime and cost of downtime in an information technology infrastructure
10/02/2003US20030185087 Dynamic gate with conditional keeper for soft error rate reduction
10/02/2003US20030185084 Integrated circuit capable of easily applying address selection voltage
10/02/2003US20030184364 Semiconductor integrated circuit with leak current cut-off circuit