Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996) |
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04/06/2004 | US6717456 Level conversion circuit |
04/06/2004 | US6717455 Apparatus and method to use a single reference component in a master-slave configuration for multiple circuit compensation |
04/06/2004 | US6717453 Level shift circuit having at least two separate signal paths |
04/06/2004 | US6717452 Level shifter |
04/06/2004 | US6717448 Data output method and data output circuit for applying reduced precharge level |
04/06/2004 | US6717445 Symmetric voltage follower buffer |
04/06/2004 | US6717443 Method and apparatus for mitigating the hysteresis effect in a sensing circuit |
04/06/2004 | US6717442 Dynamic to static converter with noise suppression |
04/06/2004 | US6717440 System and method for improving signal propagation |
04/06/2004 | US6717438 Clocked half-rail differential logic with single-rail logic |
04/06/2004 | US6717436 Reconfigurable gate array |
04/06/2004 | US6717435 Programmable logic device and programming method |
04/06/2004 | US6717433 Reconfigurable integrated circuit with integrated debugging facilities and scalable programmable interconnect |
04/06/2004 | US6717235 Semiconductor integrated circuit device having a test path |
04/01/2004 | WO2004027995A2 Integrated circuit comprising an sstl (stub series terminated logic) pre-driver stage using regulated power supply and method for performing an sstl operation |
04/01/2004 | WO2004027777A2 A fast controlled output buffer |
04/01/2004 | WO2004027705A1 Adaptive problem determination and recovery in a computer system |
04/01/2004 | WO2004027688A2 Power supply for an asynchronous data treatment circuit |
04/01/2004 | WO2004027545A2 High speed zero dc power programmable logic device (pld) architecture |
04/01/2004 | WO2003032159A3 Error detection on programmable logic resources |
04/01/2004 | US20040064758 Query trees including or nodes for event filtering |
04/01/2004 | US20040061547 Semiconductor integrated circuit device |
04/01/2004 | US20040061542 Clocked inverter, nand, nor and shift register |
04/01/2004 | US20040061535 Symmetric voltage follower buffer |
04/01/2004 | US20040061534 Drive circuit |
04/01/2004 | US20040061533 Programmable driver method and apparatus for high and low voltage operation |
04/01/2004 | US20040061532 Differntial output circuit for improving bandwidth |
04/01/2004 | US20040061531 Flip-flop circuit for use in electronic devices |
04/01/2004 | US20040061529 Status scheme signal processing circuit |
04/01/2004 | US20040061527 Current source fabricated using thick oxide to drop large percentage of supply voltage, protecting thin oide from damage caused by large voltage swings |
04/01/2004 | US20040061526 Cascode SSTL output buffer using source followers |
04/01/2004 | US20040061525 Voltage level shifting circuit |
04/01/2004 | US20040061524 Digital electronic circuit for translating high voltage levels to low voltage levels |
04/01/2004 | US20040061523 Method of transparently reducing power consumption of a high-speed communication link |
04/01/2004 | US20040061522 Digital level shifter with reduced power dissipation and false transmission blocking |
04/01/2004 | US20040061521 Level shifting circuit |
04/01/2004 | US20040061520 Universal input apparatus |
04/01/2004 | US20040061137 Integrated circuit beta compensator for external interface circuitry |
04/01/2004 | DE69530812T2 Integrierte Halbleiterschaltung A semiconductor integrated circuit |
04/01/2004 | CA2499277A1 High speed zero dc power programmable logic device (pld) architecture |
04/01/2004 | CA2499103A1 A fast controlled output buffer |
03/31/2004 | EP1404050A2 Input/output circuit for simultaneously bidirectional transmission |
03/31/2004 | EP1404019A1 Programmable input/output block |
03/31/2004 | EP1403752A1 Power supply decoupling for parallel terminated transmission line |
03/31/2004 | EP1402694A2 Line driver with current source output and high immunity to rf signals |
03/31/2004 | EP1402640A1 Input pad with improved noise immunity and output characteristics |
03/31/2004 | EP1402636A2 Integrated circuit and method for testing the integrated circuit |
03/31/2004 | EP1402395A2 Programmable logic device including programmable interface core and central processing unit |
03/31/2004 | EP1402392A1 System and method for web server with a reconfigurable processor operating under single operation system image |
03/31/2004 | EP1010245A4 System for compensating for temperature induced delay variation in an integrated circuit |
03/31/2004 | EP0956645B1 Field programmable processor |
03/31/2004 | CN1486533A Magnetic logic elements |
03/31/2004 | CN1486464A Method and apparatus for communicating with a host |
03/31/2004 | CN1485979A Multi-level output circuit |
03/31/2004 | CN1144368C Driving circuit |
03/31/2004 | CN1144281C Double-swing charge-restoring low-power consumption circuit structure |
03/30/2004 | US6715012 Bus system |
03/30/2004 | US6714615 MOS-type semiconductor integrated circuit |
03/30/2004 | US6714595 Signal transmission circuits that use multiple input signals to generate a respective transmit signal and methods of operating the same |
03/30/2004 | US6714462 Method and circuit for generating constant slew rate output signal |
03/30/2004 | US6714461 Semiconductor device with data output circuit having slew rate adjustable |
03/30/2004 | US6714184 Liquid crystal display apparatus having level conversion circuit |
03/30/2004 | US6714059 High-speed domino logic circuit |
03/30/2004 | US6714055 Output driver devices |
03/30/2004 | US6714051 Logic circuitry-implemented bus buffer |
03/30/2004 | US6714050 I/O cell configuration for multiple I/O standards |
03/30/2004 | US6714048 Input buffer with voltage clamping for compatibility |
03/30/2004 | US6714047 Semiconductor integrated circuit |
03/30/2004 | US6714046 Level shifter and electro-optical apparatus incorporating the same |
03/30/2004 | US6714044 Hi-speed parallel configuration of programmable logic |
03/30/2004 | US6714043 Output buffer having programmable drive current and output voltage limits |
03/30/2004 | US6714042 Specialized programmable logic region with low-power mode |
03/30/2004 | US6714041 Programming on-the-fly (OTF) |
03/30/2004 | US6714040 Automated boundary-scan chain composition method using a device database and access mechanism for storing and retrieving situation-dependent operation options |
03/30/2004 | US6714039 Internal bus termination technique for integrated circuits with local process/voltage/temperature compensation |
03/30/2004 | US6714038 Apparatus for controlling input termination of semiconductor memory device and method for the same |
03/30/2004 | US6712437 Printhead board, printhead and printing apparatus |
03/25/2004 | WO2004025468A1 Semiconductor device |
03/25/2004 | WO2003001351A3 Method for smoothing dI/dT noise due to clock transitions |
03/25/2004 | WO2002093404A3 Computing system |
03/25/2004 | WO2002054771A3 Multi-standard channel decoder for real-time digital broadcast reception |
03/25/2004 | US20040059966 Adaptive problem determination and recovery in a computer system |
03/25/2004 | US20040059845 Simultaneous bidirectional input/output circuit |
03/25/2004 | US20040057169 SSTL pull-up pre-driver design using regulated power supply |
03/25/2004 | US20040056714 Multi-level output circuit |
03/25/2004 | US20040056705 Enhanced conductivity body biased PMOS driver |
03/25/2004 | US20040056700 Sstl pull-down pre-driver design using regulated power supply |
03/25/2004 | US20040056693 Integrated circuit having an input circuit |
03/25/2004 | US20040056688 Programmable semiconductor device including universal logic modules coping with as many user inverters |
03/25/2004 | US20040056687 Complementary input dynamic muxed-decoder |
03/25/2004 | US20040056686 Complementary input dynamic logic |
03/25/2004 | US20040056685 Complementary input dynamic logic for complex logic functions |
03/25/2004 | US20040056684 Synchronizing interface device for computer facilities |
03/25/2004 | US20040056682 Semiconductor integrated circuit |
03/25/2004 | US20040056681 SSTL voltage translator with dynamic biasing |
03/25/2004 | US20040056679 High speed zero DC power programmable logic device (PLD) architecture |
03/25/2004 | US20040056678 Power supply decoupling for parallel terminated transmission line |
03/24/2004 | EP1401102A2 Programmable semiconductor device including universal logic modules comprising multiplexers |
03/24/2004 | EP1399828A2 An integrated circuit arrangement with feature control |
03/24/2004 | CN1484383A Reprogrammed logic array |