Patents
Sitemap › H03 - Basic electronic circuitry › H03K - Pulse technique › H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996)
08/2003
08/28/2003WO2003071609A1 Light-emitting device having pnpn structure and light-emitting device array
08/28/2003WO2003030360A3 High voltage cmos output driver in low voltage process
08/28/2003US20030162514 Method and its apparatus for increasing output power of the carriers of wide-band multi-carrier base station
08/28/2003US20030162356 Semiconductor integrated circuit and method of manufacturing the same
08/28/2003US20030161203 Multi-level semiconductor memory architecture and method of forming the same
08/28/2003US20030160646 Circuits for a low swing clocking scheme
08/28/2003US20030160639 Semiconductor integrated circuit device
08/28/2003US20030160634 Semiconductor integrated circuit
08/28/2003US20030160632 Programmable multi-standard I/O architecture for FPGAs
08/28/2003US20030160630 Bidirectional edge accelerator circuit
08/27/2003EP1338013A2 Circuit arrangement
08/27/2003EP1264406B1 Level-shifter for extremely low power supply
08/27/2003EP1163723B1 Delay stabilization system for an integrated circuit
08/27/2003CN1119863C System cnnector
08/26/2003US6611923 System and method for backing up data stored in multiple mirrors on a mass storage subsystem under control of a backup server
08/26/2003US6611157 Differential signal output circuit
08/26/2003US6611155 Internally and externally biased dual mode 1394 compliant driver
08/26/2003US6611154 Circuit for improving noise immunity by DV/DT boosting
08/26/2003US6611153 Tileable field-programmable gate array architecture
08/21/2003WO2003069780A1 Multi power supply circuit protection apparatus and method
08/21/2003WO2003069673A1 Malfunction suprressing circuit for semiconductor device
08/21/2003WO2002056515A3 Double data rate flip-flop
08/21/2003US20030159121 Variable stage ratio buffer insertion for noise optimization in a logic network
08/21/2003US20030156371 Methods and systems for reducing power-on failure of integrated circuits
08/21/2003US20030155962 Semiconductor device
08/21/2003CA2475948A1 Multi power supply circuit protection apparatus and method
08/20/2003CN2567779Y Carbon nano-pipe 'OR' gate logical device
08/20/2003CN1118936C High-speed low-noise output buffer
08/20/2003CN1118935C Signal conversion circuit with dynamically regulated reference voltage and crystal chip group using the same
08/20/2003CN1118926C Input amplifier in one side cut-off current for input signal with sharpe edge
08/20/2003CN1118756C Method for debugging basic I/O system of keyboard of notebook computer
08/19/2003US6608791 Semiconductor device incorporating internal power supply for compensating for deviation in operating condition and fabrication process conditions
08/19/2003US6608517 Live-insertion PMOS biasing circuit for NMOS bus switch
08/19/2003US6608515 Bus agent utilizing dynamic biasing circuitry to translate a signal to a core voltage level
08/19/2003US6608509 Semiconductor integrated circuit device and microcomputer
08/19/2003US6608507 Memory system including a memory device having a controlled output driver characteristic
08/19/2003US6608506 Dynamic termination logic driver with improved impedance control
08/19/2003US6608505 Ouput buffer circuit
08/19/2003US6608500 I/O architecture/cell design for programmable logic device
08/19/2003CA2260504C Programmable input/output circuit for fpga for use in ttl, gtl, gtlp, lvpecl and lvds circuits
08/14/2003WO2003067761A1 Input stage resistant against high voltage swings
08/14/2003WO2003067759A1 Digital electronic circuit with low power consumption
08/14/2003WO2003067599A1 Multiple write-port memory
08/14/2003WO2002021695A3 Depopulated programmable logic array
08/14/2003WO2002021694A3 Tileable field-programmable gate array architecture
08/14/2003US20030154458 Emulation circuit with a hold time algorithm, logic analyzer and shadow memory
08/14/2003US20030153156 Logic array and dynamic logic method
08/14/2003US20030151962 Semiconductor integrated circuit device
08/14/2003US20030151954 Input/output buffer circuit
08/14/2003US20030151444 Semiconductor device malfunction preventive circuit
08/14/2003US20030151429 Single event upset immune logic family
08/14/2003US20030151428 5 Volt tolerant input/output buffer
08/14/2003US20030151427 Programmable driver for an I/O pin of an integrated circuit
08/14/2003US20030151426 Logic circuits using polycrystalline semiconductor thin film transistors
08/14/2003US20030151425 Asynchronous serial poll circuit
08/13/2003EP1335493A1 Reduction of sensitivity for spikes in integrated circuits
08/13/2003EP1335386A2 Shift register
08/13/2003EP1335309A1 Method of designing a semiconductor integrated circuit
08/13/2003EP1334556A1 Magnetic logic elements
08/13/2003EP1147605B1 Improved voltage translator circuit
08/13/2003EP1145426B1 Data pulse receiver
08/13/2003CN2566462Y Single wall carbon nano tube 'and ' gate logical device
08/13/2003CN1435947A Logical circuit and semiconductor device
08/13/2003CN1435911A Signal transmission system
08/13/2003CN1435805A Drive circuit and display apparatus comprising same
08/13/2003CN1435739A 基准电压电路和电子器件 Reference voltage circuit and electronics
08/13/2003CN1118007C Digital data level control circuit
08/12/2003USRE38213 Data output circuit with reduced output noise
08/12/2003US6606271 Circuit having a controllable slew rate
08/12/2003US6605983 Voltage conversion circuit
08/12/2003US6605981 Apparatus for biasing ultra-low voltage logic circuits
08/12/2003US6605963 Semiconductor integrated circuit and method of switching source potential of transistor in semiconductor integrated circuit
08/12/2003US6605962 PLD architecture for flexible placement of IP function blocks
08/12/2003US6605961 Low voltage PLA's with ultrathin tunnel oxides
08/12/2003US6605959 Structure and method for implementing wide multiplexers
08/12/2003US6605958 Precision on-chip transmission line termination
08/12/2003US6605833 Integrated circuit with circuit elements having different supply voltages
08/07/2003WO2003065583A1 Logical operation circuit and logical operation method
08/07/2003WO2003065582A1 Logical operation circuit and logical operation method
08/07/2003WO2003065581A1 Method and apparatus for communication using a distributed multiplexed bus
08/07/2003WO2003065341A2 Apparatus and method for interfacing a digital video signal having a tdms format with a plurality digital video interface receivers
08/07/2003US20030149833 Magnetoresistive memory for a complex programmable logic device
08/07/2003US20030147488 Shift register
08/07/2003US20030146776 Semiconductor device capable of maintaining output signal even if internal power supply potential is turned off
08/07/2003US20030146774 ASIC architechture for active-compensation of a programmable impedance I/O
08/07/2003US20030146773 Transmission gate based signal transition accelerator
08/07/2003US20030146476 Semiconductor device
08/07/2003US20030146454 Semiconductor integrated circuit and method of manufacturing of semiconductor integrated circuit
08/06/2003EP1333584A1 Demultiplexer apparatus and communication apparatus using the same
08/06/2003EP1333496A2 Semiconductor device for RF signal switching with high isolation layout for the signal lines
08/06/2003EP1332590A2 Line-driver with loopback protection
08/06/2003EP1177628B1 Circuit arrangement for generating current impulses in the supply current of integrated circuits
08/06/2003CN1435008A 可编程缓冲器电路 Programmable buffer circuit
08/06/2003CN1434953A Method for implementing physical design for dynamically reconfigurable logic circuit
08/06/2003CN1434569A 输出电路 Output circuit
08/06/2003CN1434374A 半导体装置 Semiconductor device
08/06/2003CN1117432C Scalable multiple level interconnect architecture
08/06/2003CN1117425C Data-outputting buffer circuit
08/06/2003CN1117379C Field programmable memory array
08/05/2003US6604228 Technique of fabricating integrated circuits having interfaces compatible with different operating voltage conditions
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