Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
06/2012
06/21/2012US20120156843 Dielectric layer for gallium nitride transistor
06/21/2012US20120156842 Method of manufacturing semiconductor memory device
06/21/2012US20120156841 Method of fabricating a semiconductor memory device
06/21/2012US20120156840 Phase change memory device and method of manufacturing the same
06/21/2012US20120156839 Patterning of a Stressed Dielectric Material in a Contact Level Without Using an Underlying Etch Stop Layer
06/21/2012US20120156838 Multi-gate non-planar field effect transistor structure and method of forming the structure using a dopant implant process to tune device drive current
06/21/2012US20120156837 Sacrificial Spacer Approach for Differential Source/Drain Implantation Spacers in Transistors Comprising a High-K Metal Gate Electrode Structure
06/21/2012US20120156836 Method for forming iii-v semiconductor structures including aluminum-silicon nitride passivation
06/21/2012US20120156835 Etching method and manufacturing method of thin film transistor
06/21/2012US20120156834 Methods for manufacturing array substrates
06/21/2012US20120156833 Nanowire transistor and method for fabricating the same
06/21/2012US20120156832 Electronic component
06/21/2012US20120156831 Method of manufacturing card
06/21/2012US20120156830 Method of forming a ring-shaped metal structure
06/21/2012US20120156823 Method of forming semiconductor device
06/21/2012US20120156820 Composite sacrificial structure for reliably creating a contact gap in a mems switch
06/21/2012US20120156819 Gallium nitride-based led fabrication with pvd-formed aluminum nitride buffer layer
06/21/2012US20120156815 Method for fabricating light emitting diode chip
06/21/2012US20120156814 Phase-shift mask with assist phase regions
06/21/2012US20120156811 Methods of adding pads and one or more interconnect layers to the passivated topside of a wafer including connections to at least a portion of the integrated circuit pads thereon
06/21/2012US20120156810 Inspection method, inspection apparatus, exposure control method, exposure system, and semiconductor device
06/21/2012US20120156809 Manufacturing method of semiconductor device, exposure method, and exposure apparatus
06/21/2012US20120156808 Method for applying liquid material, and apparatus and program for same
06/21/2012US20120156807 Method of updating calibration data and a device manufacturing method
06/21/2012US20120156806 Magnetic random access memory integration having improved scaling
06/21/2012US20120156802 Swept-frequency semiconductor laser coupled to microfabricated biomolecular sensor and methods related thereto
06/21/2012US20120156597 Lithographic mask and manufacturing method thereof
06/21/2012US20120156373 Preparation of cerium-containing precursors and deposition of cerium-containing films
06/21/2012US20120156100 Apparatus for single molecule detection and method thereof
06/21/2012US20120155994 Vacuum processing device and vacuum processing factory
06/21/2012US20120155196 Semiconductor memory and manufacturing method
06/21/2012US20120155195 Overlapping interconnect signal lines
06/21/2012US20120155161 Three-terminal ovonic threshold switch as a current driver in a phase change memory
06/21/2012US20120155087 Movable light emitting diode device and method for fabricating the same
06/21/2012US20120155048 Wiring board, semiconductor apparatus and method of manufacturing them
06/21/2012US20120154974 High efficiency electrostatic chuck assembly for semiconductor wafer processing
06/21/2012US20120154965 Level conversion circuit and semiconductor integrated circuit device employing the level conversion circuit
06/21/2012US20120154690 Flexible integrated circuit device layers and processes
06/21/2012US20120154068 Crystal oscillator and method for manufacturing the same
06/21/2012US20120154061 Crystal oscillator and method of manufacturing the same
06/21/2012US20120153511 Hardmask composition and method of forming patterns and semiconductor integrated circuit device including the patterns
06/21/2012US20120153510 Semiconductor device, and method for supplying electric power to same
06/21/2012US20120153509 Semiconductor package and manufacturing method therefor
06/21/2012US20120153508 Thermosetting die-bonding film
06/21/2012US20120153507 Semiconductor device and method for manufacturing the same
06/21/2012US20120153506 Wiring substrate and semiconductor device, and method of manufacturing semiconductor device
06/21/2012US20120153505 Semiconductor Device and Method of Forming Thin Profile WLCSP with Vertical Interconnect over Package Footprint
06/21/2012US20120153504 Microelectronic package and method of manufacturing same
06/21/2012US20120153502 Structures comprising planar electronic devices
06/21/2012US20120153501 Semiconductor device and manufacturing method thereof
06/21/2012US20120153500 Semiconductor devices and methods of manufacturing semiconductor devices
06/21/2012US20120153496 Tsv for 3d packaging of semiconductor device and fabrication method thereof
06/21/2012US20120153495 Reduced pth pad for enabling core routing and substrate layer count reduction
06/21/2012US20120153494 Forming die backside coating structures with coreless packages
06/21/2012US20120153493 Embedded component device and manufacturing methods thereof
06/21/2012US20120153492 Method of fabrication of through-substrate vias
06/21/2012US20120153490 Interconnection structure for an integrated circuit
06/21/2012US20120153488 Simultaneous wafer bonding and interconnect joining
06/21/2012US20120153484 Methods for directly bonding together semiconductor structures, and bonded semiconductor structures formed using such methods
06/21/2012US20120153483 Barrierless single-phase interconnect
06/21/2012US20120153482 Structure and methods of forming contact structures
06/21/2012US20120153481 Semiconductor device and method for manufacturing the same
06/21/2012US20120153480 Metallization Systems of Semiconductor Devices Comprising a Copper/Silicon Compound as a Barrier Material
06/21/2012US20120153479 Performance Enhancement in Metallization Systems of Microstructure Devices by Incorporating an Intermediate Barrier Layer
06/21/2012US20120153478 Liner layers for metal interconnects
06/21/2012US20120153477 Methods for metal plating and related devices
06/21/2012US20120153476 Etched wafers and methods of forming the same
06/21/2012US20120153475 Method of assembling two integrated circuits and corresponding structure
06/21/2012US20120153474 Integrated circuit system with reduced polysilicon residue and method of manufacture thereof
06/21/2012US20120153470 Bga package structure and method for fabricating the same
06/21/2012US20120153468 Elimination of RDL Using Tape Base Flip Chip on Flex for Die Stacking
06/21/2012US20120153462 Semiconductor device and method of manufacturing semiconductor device
06/21/2012US20120153461 Semiconductor component, semiconductor wafer component, manufacturing method of semiconductor component, and manufacturing method of joining structure
06/21/2012US20120153460 Bump structure and manufacturing method thereof
06/21/2012US20120153459 Method for chip scale package and package structure thereof
06/21/2012US20120153458 Ic device having electromigration resistant feed line structures
06/21/2012US20120153457 Semiconductor package manufacturing method and semiconductor package
06/21/2012US20120153456 Semiconductor device and method for manufacturing the same
06/21/2012US20120153453 Metallic thermal joint for high power density chips
06/21/2012US20120153450 Self-organizing network with chip package having multiple interconnection configurations
06/21/2012US20120153449 Non-leaded package structure and manufacturing method thereof
06/21/2012US20120153448 Semiconductor device and manufacturing method of semiconductor device
06/21/2012US20120153447 Microelectronic flip chip packages with solder wetting pads and associated methods of manufacturing
06/21/2012US20120153446 Microelectronic packages with enhanced heat dissipation and methods of manufacturing
06/21/2012US20120153442 Silicon nitride film and process for production thereof, computer-readable storage medium, and plasma cvd device
06/21/2012US20120153439 Stacked layers of nitride semiconductor and method for manufacturing the same
06/21/2012US20120153438 Multiple noble metals for lifetime suppression for power semiconductors
06/21/2012US20120153434 Metal-insulator-metal capacitors with high capacitance density
06/21/2012US20120153432 Semiconductor device and method for manufacturing same
06/21/2012US20120153430 Integration of shallow trench isolation and through-substrate vias into integrated circuit designs
06/21/2012US20120153428 Electronic devices, circuits and their manufacture
06/21/2012US20120153427 Integrated circuit and method of fabricating same
06/21/2012US20120153426 Void-free wafer bonding using channels
06/21/2012US20120153425 Process for fabricating integrated-circuit chips
06/21/2012US20120153424 Hardmask composition, method of forming a pattern using the same, and semiconductor integrated circuit device including the pattern
06/21/2012US20120153413 Non-Volatile Memory Cell with Lateral Pinning
06/21/2012US20120153411 Spin torque transfer magnetoresistive random access memory in disk base with reduced threshold current
06/21/2012US20120153408 Mems device forming method and device with mems structure
06/21/2012US20120153406 Semiconductor device and method for fabricating the same
06/21/2012US20120153405 Semiconductor Device Comprising a Contact Structure with Reduced Parasitic Capacitance