Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
06/2012
06/21/2012US20120153402 Embedded sigma-shaped semiconductor alloys formed in transistors by applying a uniform oxide layer prior to cavity etching
06/21/2012US20120153401 Differential Threshold Voltage Adjustment in PMOS Transistors by Differential Formation of a Channel Semiconductor Material
06/21/2012US20120153399 Low-Diffusion Drain and Source Regions in CMOS Transistors for Low Power/High Performance Applications
06/21/2012US20120153398 Encapsulation of Closely Spaced Gate Electrode Structures
06/21/2012US20120153395 Semiconductor device and method for manufacturing semiconductor device
06/21/2012US20120153394 Method for manufacturing a strained channel mos transistor
06/21/2012US20120153393 Transistor, Semiconductor Device Comprising the Transistor and Method for Manufacturing the Same
06/21/2012US20120153392 Manufacturing method for semiconductor structure, and pixel structure and manufacturing method for the same
06/21/2012US20120153388 Semiconductor device and method for manufacturing the same
06/21/2012US20120153387 Transistors with high concentration of boron doped germanium
06/21/2012US20120153385 Semiconductor device and method for fabricating the same
06/21/2012US20120153383 Semiconductor device with buried gate and method for fabricating the same
06/21/2012US20120153381 Semiconductor device and method for forming the same
06/21/2012US20120153380 Method for fabricating semiconductor device
06/21/2012US20120153378 Semiconductor device and method for forming the same
06/21/2012US20120153377 Edge rounded field effect transistors and methods of manufacturing
06/21/2012US20120153376 Stacked metal fin cell
06/21/2012US20120153374 Semiconductor device and method of manufacturing the same
06/21/2012US20120153369 Semiconductor device and method for forming the same
06/21/2012US20120153366 Semiconductor Device Comprising Self-Aligned Contact Bars and Metal Lines With Increased Via Landing Regions
06/21/2012US20120153363 Semiconductor device with buried gates and fabrication method thereof
06/21/2012US20120153362 Semiconductor device and method of manufacturing the same
06/21/2012US20120153361 Field-effect transistor and manufacturing method thereof
06/21/2012US20120153360 Method and device for regenerating a hydrogen sensor
06/21/2012US20120153358 Integrated heat pillar for hot region cooling in an integrated circuit
06/21/2012US20120153357 Contact integration for three-dimensional stacking semiconductor devices
06/21/2012US20120153356 High electron mobility transistor with indium gallium nitride layer
06/21/2012US20120153354 Performance enhancement in transistors comprising high-k metal gate stacks and an embedded stressor by performing a second epitaxy step
06/21/2012US20120153353 Buried oxidation for enhanced mobility
06/21/2012US20120153351 Stress modulated group III-V semiconductor device and related method
06/21/2012US20120153350 Semiconductor devices and methods for fabricating the same
06/21/2012US20120153349 Semiconductor device and method of manufacturing the same
06/21/2012US20120153348 Insulated gate bipolar transistor and manufacturing method thereof
06/21/2012US20120153346 Method for producing recycled substrate, recycled substrate, nitride semiconductor element, and lamp
06/21/2012US20120153338 Substrate structure and fabrication thereof, and light emitting diode devices fabricated from the same
06/21/2012US20120153325 Integrated Reflector and Thermal Spreader and Thermal Spray Fabrication Method
06/21/2012US20120153312 Array substrates and methods for manufacturing the same
06/21/2012US20120153310 Display substrate and method for manufacturing the same
06/21/2012US20120153303 Semiconductor element and method for manufacturing same
06/21/2012US20120153302 Recessed gate-type silicon carbide field effect transistor and method of producing same
06/21/2012US20120153300 Semiconductor devices with back surface isolation
06/21/2012US20120153297 Ohmic cathode electrode on the backside of nonpolar m-plane (1-100) and semipolar (20-21) bulk gallium nitride substrates
06/21/2012US20120153295 Ionic junction for radiation detectors
06/21/2012US20120153294 Semiconductor Structures Having Directly Bonded Diamond Heat Sinks and Methods for Making Such Structures
06/21/2012US20120153288 Thin film transistor device and manufacturing method thereof
06/21/2012US20120153285 Solution processable passivation layers for organic electronic devices
06/21/2012US20120153281 Apparatus and methods for determining overlay of structures having rotational or mirror symmetry
06/21/2012US20120153279 Semiconductor sensor reliability operation
06/21/2012US20120153278 Thin film transistor, method of manufacturing the same and flat panel display device having the same
06/21/2012US20120153277 Channel-etch type thin film transistor and method of manufacturing the same
06/21/2012US20120153275 Semiconductor device and manufacturing method thereof
06/21/2012US20120153262 Systems and process for forming carbon nanotube sensors
06/21/2012US20120153261 Semiconductor Device And Method Of Manufacturing The Same
06/21/2012US20120153260 Chemically-etched nanostructures and related devices
06/21/2012US20120153257 High-quality non-polar/semi-polar semiconductor element on an unevenly patterned substrate and a production method therefor
06/21/2012US20120153251 Selective emitter nanowire array and methods of making same
06/21/2012US20120153249 Composition of Memory Cell With Resistance-Switching Layers
06/21/2012US20120153218 Polishing composition
06/21/2012US20120152482 Aluminum bonding member and method for producing same
06/21/2012US20120152351 Photovoltaic device
06/21/2012US20120152029 Semiconductor pressure sensor and method of manufacturing the same
06/21/2012US20120151997 Method of making an electrically conductive structure, method of making a gas sensor, gas sensor obtained with the method and use of the gas sensor for sensing a gas
06/21/2012DE112010003311T5 Verfahren zur Herstellung von Silizium-Epitaxiewafern Process for the preparation of silicon epitaxial wafers
06/21/2012DE112010003306T5 Verfahren zur Herstellung eines epitaktischen Siliziumwafers A method for producing an epitaxial silicon wafer
06/21/2012DE112010003053T5 Verfahren zumn Herstellen einer Siliziumkarbid-Halbleitervorrichtung A method zumn producing a silicon carbide semiconductor device
06/21/2012DE112010003051T5 Abgeschirmte Kontakte in einem MOSFET mit abgeschirmtem Gate Screened contacts in a shielded gate MOSFET
06/21/2012DE112010002895T5 Verfahren und Struktur zur Bildung leistungsstarker FETs mit eingebetteten Stressoren Method and structure for the formation of high-performance FETs with embedded stressors
06/21/2012DE112010002324T5 Unterschiedlich ausgerichtete Nanodrähte mit Gate-Elektrodenstapeln als Spannungselemente Differently oriented nanowires with gate electrode stacks as tension members
06/21/2012DE112010000721T5 Verfahren zur Herstellung von MOS-Bauelementen mit epitaktisch aufgewachsenen verspannungsinduzierenden Source- und Draingebieten A process for producing MOS devices having epitaxially grown stress-inducing source and drain regions
06/21/2012DE112009005044T5 Halbleitervorrichtung und Verfahren zu deren Herstellung Semiconductor device and process for their preparation
06/21/2012DE112009004892T5 Aktiver-Anschlussstift-Verbindungsüberwachungs-System und -Verfahren Active-pin connection monitoring system and method
06/21/2012DE112009004069T5 Integrierte-Schaltung-Befestigungsstruktur mitLötkugeln und Anschlussstiften MitLötkugeln integrated circuit mounting structure and connection pins
06/21/2012DE112009004065T5 HALBLEITEREINRICHTUNG MIT EINEM HALBLEITERSUBSTRAT EINSCHLIEßLICHEINEM DIODENBEREICH UND EINEM IGBT BEREICH SEMICONDUCTOR DEVICE HAVING A SEMICONDUCTOR SUBSTRATE EINSCHLIEßLICHEINEM DIODES AREA AND A RANGE IGBT
06/21/2012DE112009002570T5 Lötmetalllegierung und Halbleiterbauteil Solder alloy and semiconductor device
06/21/2012DE112009001701B4 Laser-Scribing-System zum Strukturieren von Substraten, Verfahren zum Strukturieren von Substraten und Verwendung eines Laser-Scribing-Systems Laser scribing system for structuring substrates, methods for patterning of substrates and using a laser scribing system
06/21/2012DE112008000079B4 Plasma-Dicing-Vorrichtung und Verfahren zum Herstellen von Halbleiterchips Plasma dicing apparatus and process for producing semiconductor chips
06/21/2012DE112006000307B4 Verfahren und vorrichtung zur herstellung einer halbleitereinrichtung Method and device for manufacturing a semiconductor device
06/21/2012DE10391811B4 Verfahren zum Zerlegen eines Halbleiterwafers A method for decomposing a semiconductor wafer
06/21/2012DE10358691B4 Verfahren zum Beladen einer Sockel-Einrichtung mit einem entsprechenden Halbleiter-Bauelement A method for loading a socket device with a corresponding semiconductor device
06/21/2012DE102012206398A1 Method for performing two-sided planarization of semiconductor material e.g. wafer, involves providing the insert inside recesses in rotary disc, while supplying the polishing agent in the recess
06/21/2012DE102011088732A1 Verfahren zum Herstellen eines Stöpsels in einem Halbleiterkörper A method of manufacturing a plug in a semiconductor body
06/21/2012DE102011088714A1 Halbleiterbauelemente und Verfahren zur deren Herstellung Semiconductor devices and methods for their preparation
06/21/2012DE102011087064A1 Halbleitervorrichtung und Verfahren für deren Herstellung Semiconductor device and methods for their preparation
06/21/2012DE102011086733A1 Halbleitervorrichtung Semiconductor device
06/21/2012DE102011085196A1 Bipolartransistor mit isoliertem Gate und Herstellungsverfahren desselben Of the same insulated gate bipolar transistor and manufacturing processes
06/21/2012DE102011056565A1 Verfahren zum Bilden einer Cadmiumzinnoxid-Schicht und einer photovoltaischen Vorrichtung A method of forming a cadmium tin oxide layer and a photovoltaic device
06/21/2012DE102011056544A1 Halbleitervorrichtung und Verfahren zur Herstellung derselben A semiconductor device and method of manufacturing the same
06/21/2012DE102011055816A1 Halbleitervorrichtung und Verfahren zur Herstellung einer Halbleitervorrichtung A semiconductor device and method of manufacturing a semiconductor device
06/21/2012DE102011055545A1 Testvorrichtung Test device
06/21/2012DE102011055530A1 Testing apparatus for avalanche breakdown testing of e.g. insulated gate bipolar transistor, has probe whose opening/closing structure holds operator from accessing substrate accommodated in probe in locked state
06/21/2012DE102010063782A1 Leistungssteigerung in Transistoren mit Metallgatestapeln mit großem ε und einem eingebetteten Verspannungsmaterial durch Ausführen eines zweiten Epitaxieschrittes Performance increase in transistors with metal gate stacks with large ε and an embedded strain material by performing a second epitaxy
06/21/2012DE102010063781A1 Unterschiedliche Schwellwertspannungseinstellung in PMOS-Transistoren durch unterschiedliche Herstellung eines Kanalhalbleitermaterials Different Schwellwertspannungseinstellung in PMOS transistors with different channel producing a semiconductor material
06/21/2012DE102010063780A1 Halbleiterbauelement mit einer Kontaktstruktur mit geringerer parasitärer Kapazität Semiconductor component having a contact structure with lower parasitic capacitance
06/21/2012DE102010063778A1 Erhöhte Strukturierungsgleichmäßigkeit von Gateelektroden eines Halbleiterbauelements durch eine späte Gatedotierung Increased structuring uniformity of gate electrodes of a semiconductor device by a late gate doping
06/21/2012DE102010063775A1 Halbleiterbauelement mit selbstjustierten Kontaktbalken und Metallleitungen mit vergrößerten Aufnahmegebieten für Kontaktdurchführungen Semiconductor device with self-aligned contact beams and metal lines with enlarged receiving areas for vias
06/21/2012DE102010063774A1 Herstellung einer Kanalhalbleiterlegierung mittels einer Nitridhartmaskenschicht und einer Oxidmaske Producing a channel semiconductor alloy by means of a Nitridhartmaskenschicht and an oxide mask
06/21/2012DE102010063772A1 Eingebettete sigma-förmige Halbleiterlegierung, die in Transistoren durch Anwenden einer gleichmäßigen Oxidschicht vor dem Ätzen der Aussparungen hergestellt ist Embedded sigma-shaped semiconductor alloy, which is produced in transistors by applying a uniform oxide layer prior to the etching of the recesses
06/21/2012DE102010063407A1 Verfahren und Vorrichtung zur Herstellung von Silicium-Dünnstäben Method and apparatus for production of silicon thin rods
06/21/2012DE102010063299A1 Leistungssteigerung in Metallisierungsystemen mit Mikrostrukturbauelementen durch Einbau einer Barrierenzwischenschicht Performance improvement in Metallisierungsystemen with microstructure devices by installing a barrier interlayer
06/21/2012DE102010063298A1 Strukturierung eines verspannten dielektrischen Materials in einer Kontaktebene ohne Verwendung einer verbleibenden Ätzstoppschicht Structuring of a stressed dielectric material in a contact plane without using an etch stop layer remaining