Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
11/2014
11/25/2014US8894877 Method, apparatus and composition for wet etching
11/25/2014US8894876 Etchant for electrode and method of fabricating thin film transistor array panel using the same
11/25/2014US8894871 Lithography method using tilted evaporation
11/25/2014US8894870 Multi-step method and apparatus for etching compounds containing a metal
11/25/2014US8894868 Substrate containing aperture and methods of forming the same
11/25/2014US8894867 Method for producing and structuring a zinc oxide layer and zinc oxide layer
11/25/2014US8894828 FIB process for selective and clean etching of copper
11/25/2014US8894826 Copper indium gallium selenide (CIGS) thin films with composition controlled by co-sputtering
11/25/2014US8894807 Device and method for detaching a semiconductor wafer from a substrate
11/25/2014US8894806 Plasma processing apparatus and plasma processing method
11/25/2014US8894803 Apparatus and method for etching the surface of a semiconductor substrate
11/25/2014US8894800 Polymeric edge seal for bonded substrates
11/25/2014US8894775 Substrate processing apparatus and substrate processing method
11/25/2014US8894774 Composition and method to remove excess material during manufacturing of semiconductor devices
11/25/2014US8894344 Vertical wafer buffering system
11/25/2014US8893953 Wire bonding method in circuit device
11/25/2014US8893923 Methods and systems for dispensing different liquids for high productivity combinatorial processing
11/25/2014US8893753 Substrate storage pod and lid member thereof, and processing apparatus for a substrate
11/25/2014US8893702 Ductile mode machining methods for hard and brittle components of plasma processing apparatuses
11/25/2014US8893650 Substrate treatment apparatus, substrate treatment method, and non-transitory storage medium
11/25/2014US8893642 Airflow management for low particulate count in a process tool
11/25/2014US8893380 Method of manufacturing a chip embedded printed circuit board
11/25/2014US8893379 Manufacturing method of package structure
11/25/2014US8893377 Apparatus and method for mounting semiconductor light-emitting element
11/20/2014US20140343884 Method and system for intelligent weak pattern diagnosis, and non-transitory computer-readable storage medium
11/20/2014US20140342683 Wireless communication system
11/20/2014US20140342646 Polishing pad
11/20/2014US20140342643 Chemical mechanical polishing fixture having lateral perforation structures
11/20/2014US20140342641 Polishing pad
11/20/2014US20140342640 Polishing apparatus and polishing method
11/20/2014US20140342576 Ultraviolet-curable resin material for pattern transfer and magnetic recording medium manufacturing method using the same
11/20/2014US20140342575 Method for Forming an Interfacial Layer on a Semiconductor Using Hydrogen Plasma
11/20/2014US20140342574 Pattern formation method
11/20/2014US20140342573 Method for manufacturing semiconductor device, method for processing substrate, substrate processing apparatus and recording medium
11/20/2014US20140342572 Decapsulator with applied voltage and etchant cooling system for etching plastic-encapsulated devices
11/20/2014US20140342571 Wafer etching apparatus and wafer etching method using the same
11/20/2014US20140342570 Etch process having adaptive control with etch depth of pressure and power
11/20/2014US20140342569 Near surface etch selectivity enhancement
11/20/2014US20140342568 Controlling temperature of a faraday shield
11/20/2014US20140342567 Method of manufacturing semiconductor structure
11/20/2014US20140342566 Manufacturing Method of Semiconductor Device
11/20/2014US20140342565 Method of manufacturing dual gate oxide devices
11/20/2014US20140342564 Photomask With Three States For Forming Multiple Layer Patterns With A Single Exposure
11/20/2014US20140342563 Methods of Forming a Pattern On a Substrate
11/20/2014US20140342562 Polishing composition
11/20/2014US20140342561 Polishing composition
11/20/2014US20140342560 Polishing composition
11/20/2014US20140342559 Method of forming a spacer patterning mask
11/20/2014US20140342558 Substrate treating apparatus with substrate reordering
11/20/2014US20140342556 Reusing active area mask for trench transfer exposure
11/20/2014US20140342555 Deposition chambers with uv treatment and methods of use
11/20/2014US20140342554 Method for manufacturing thin film transistor array
11/20/2014US20140342553 Method for Forming Semiconductor Structure Having Opening
11/20/2014US20140342552 Method of forming a through-silicon via utilizing a metal contact pad in a back-end-of-line wiring level to fill the through-silicon via
11/20/2014US20140342551 Semiconductor devices and method of fabricating the same
11/20/2014US20140342550 Method for fabricating semiconductor device by damascene process
11/20/2014US20140342549 Dual damascene dual alignment interconnect scheme
11/20/2014US20140342548 Integrated Circuit Devices Including Interconnections Insulated by Air Gaps and Methods of Fabricating the Same
11/20/2014US20140342547 TSV Structures and Methods for Forming the Same
11/20/2014US20140342545 Techniques for Fabricating Fine-Pitch Micro-Bumps
11/20/2014US20140342544 Method for manufacturing semiconductor device
11/20/2014US20140342543 Method and apparatus for single step selective nitridation
11/20/2014US20140342539 Semiconductor Device Having Mixedly Mounted Components with Common Film Layers and Method of Manufacturing the Same
11/20/2014US20140342538 Ion implantation system and method
11/20/2014US20140342537 Mechanisms for forming ultra shallow junction
11/20/2014US20140342536 Defect Reduction Using Aspect Ratio Trapping
11/20/2014US20140342535 Method for manufacturing semiconductor substrate
11/20/2014US20140342534 Method and apparatus for forming amorphous silicon film
11/20/2014US20140342533 Method of strain and defect control in thin semiconductor films
11/20/2014US20140342532 Delicate dry clean
11/20/2014US20140342531 Adhesive Sheet for Semiconductor Wafer Processing, Method for Processing of Semiconductor Wafer Using Sheet
11/20/2014US20140342530 Temporary adhesive material for wafer, film for temporary adhesion using same, wafer processing laminate, and method for producing thin wafer using same
11/20/2014US20140342529 Semiconductor-on-Insulator Integrated Circuit with Back Side Gate
11/20/2014US20140342528 Method for the direct bonding of a silicon oxide layer
11/20/2014US20140342527 Integrated circuits separated by through-wafer trench isolation
11/20/2014US20140342526 Method for manufacturing semiconductor substrate
11/20/2014US20140342525 Method for manufacturing semiconductor substrate
11/20/2014US20140342524 Integrated circuit comprising an isolating trench and corresponding method
11/20/2014US20140342523 Relaxed Silicon Germanium Platform for High Speed CMOS Electronics and High Speed Analog Circuits
11/20/2014US20140342522 Reducing Variation by Using Combination Epitaxy Growth
11/20/2014US20140342521 Transistor performance using a two-step damage anneal
11/20/2014US20140342520 Vertical Power MOSFET and Methods for Forming the Same
11/20/2014US20140342519 Three-dimensional non-volatile memory device, memory system and method of manufacturing the same
11/20/2014US20140342518 Power mosfet structure and method
11/20/2014US20140342515 Esd protection using diode-isolated gate-grounded nmos with diode string
11/20/2014US20140342514 Methods for fabricating integrated circuits with the implantation of nitrogen
11/20/2014US20140342513 Semiconductor apparatus and method for manufacturing the semiconductor apparatus
11/20/2014US20140342512 High voltage iii-nitride semiconductor devices
11/20/2014US20140342511 Semiconductor structure and method for forming the same
11/20/2014US20140342510 Bulk finfet esd devices
11/20/2014US20140342509 Module and Assembly with Dual DC-Links for Three-Level NPC Applications
11/20/2014US20140342508 Hybrid substrates, semiconductor packages including the same and methods for fabricating semiconductor packages
11/20/2014US20140342506 Method for fabricating semiconductor package
11/20/2014US20140342505 Fabrication method of semiconductor package
11/20/2014US20140342504 Electronic device, method of manufacturing, and electronic device manufacturing apparatus
11/20/2014US20140342503 Compliant interconnects in wafers
11/20/2014US20140342502 Three-Dimensional Vertically Interconnected Structure and Fabricating Method Thereof
11/20/2014US20140342501 Package stacks and methods of manufacturing the same
11/20/2014US20140342500 Method and system for template assisted wafer bonding
11/20/2014US20140342499 Semiconductor device and manufacturing method thereof
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