Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
11/1996
11/26/1996US5578934 Method and apparatus for testing unpackaged semiconductor dice
11/26/1996US5578919 Method of testing semiconductor device and test apparatus for the same
11/26/1996US5578874 Hermetically self-sealing flip chip
11/26/1996US5578873 Integrated circuitry having a thin film polysilicon layer in ohmic contact with a conductive layer
11/26/1996US5578872 Planar contact with a void
11/26/1996US5578871 Integrated circuit package and method of making the same
11/26/1996US5578867 Passivation method and structure using hard ceramic materials or the like
11/26/1996US5578865 Reduction of parasitic effects in floating body mosfets
11/26/1996US5578861 Semiconductor device having redundant circuit
11/26/1996US5578860 Monolithic high frequency integrated circuit structure having a grounded source configuration
11/26/1996US5578859 Semiconductor structure having one or more lateral, high-blocking semiconductor components
11/26/1996US5578857 Double poly high density buried bit line mask ROM
11/26/1996US5578855 High-voltage CMOS transistors on a standard CMOS wafer
11/26/1996US5578853 Semiconductor memory cell having information storage transistor and switching transistor
11/26/1996US5578852 Semiconductor memory cell having information storage transistor and switching transistor
11/26/1996US5578851 Trenched DMOS transistor having thick field oxide in termination region
11/26/1996US5578850 Vertically oriented DRAM structure
11/26/1996US5578849 Semiconductor integrated circuit device including a memory device having memory cells with increased information storage capacitance
11/26/1996US5578848 Ultra thin dielectric for electronic devices and method of making same
11/26/1996US5578847 Dynamic semiconductor memory device with higher density bit line/word line layout
11/26/1996US5578846 Static ferroelectric memory transistor having improved data retention
11/26/1996US5578845 Dielectric thin film device with lead erbium zirconate titanate
11/26/1996US5578842 Charge coupled device image sensor
11/26/1996US5578841 Vertical MOSFET device having frontside and backside contacts
11/26/1996US5578839 Multilayer elements with indium gallium nitride on clad layers, dopes for p-n junctions
11/26/1996US5578838 Structure of and fabricating method for a thin film transistor
11/26/1996US5578833 For analyzing impurities on the surface of a sample
11/26/1996US5578821 Electron beam inspection system and method
11/26/1996US5578796 Apparatus for laminating and circuitizing substrates having openings therein
11/26/1996US5578745 Calibration standards for profilometers and methods of producing them
11/26/1996US5578532 Wafer surface protection in a gas deposition process
11/26/1996US5578531 Mulilayer semiconductors formed with recesses, projections and insulating layers of silicon oxide layer over fluorine surfaces, polishing the layers
11/26/1996US5578530 Manufacturing method of semiconductor device which includes forming a silicon nitride layer using a Si, N, and F containing compound
11/26/1996US5578529 Method for using rinse spray bar in chemical mechanical polishing
11/26/1996US5578527 Connection construction and method of manufacturing the same
11/26/1996US5578526 Method for forming a multi chip module (MCM)
11/26/1996US5578525 Semiconductor device and a fabrication process thereof
11/26/1996US5578524 Silicon and silicon dioxide with wires and insulation layers, buffer layers, etching and forming wire layer filling
11/26/1996US5578523 Method for forming inlaid interconnects in a semiconductor device
11/26/1996US5578522 Semiconductor device and method of fabricating same
11/26/1996US5578520 Method for annealing a semiconductor
11/26/1996US5578519 Method for forming align key pattern in semiconductor device
11/26/1996US5578518 Method of manufacturing a trench isolation having round corners
11/26/1996US5578517 Method of forming a highly transparent silicon rich nitride protective layer for a fuse window
11/26/1996US5578516 High capacitance dynamic random access memory manufacturing process
11/26/1996US5578515 Method for fabricating gate structure for nonvolatile memory device comprising an EEPROM and a latch transistor
11/26/1996US5578513 Method of making a semiconductor device having a gate all around type of thin film transistor
11/26/1996US5578512 Power MESFET structure and fabrication process with high breakdown voltage and enhanced source to drain current
11/26/1996US5578511 Method of making signal charge transfer devices
11/26/1996US5578510 Method of making an isolation layer stack semiconductor device
11/26/1996US5578509 Method of making a field effect transistor
11/26/1996US5578508 Vertical power MOSFET and process of fabricating the same
11/26/1996US5578507 Method of making a semiconductor device having buried doped and gettering layers
11/26/1996US5578506 Method of fabricating improved lateral Silicon-On-Insulator (SOI) power device
11/26/1996US5578505 Multilayer semiconductors with silicon wafers from vacuum deposition hexamethyldisilizane, treatment with oxygen to form carbon dioxide and water
11/26/1996US5578504 Method for determination of resistivity of N-type silicon epitaxial layer
11/26/1996US5578503 Rapid process for producing a chalcopyrite semiconductor on a substrate
11/26/1996US5578423 Method for the preparation of a pattern overlay accuracy-measuring mark
11/26/1996US5578422 Reduced projection exposure method using phase shift mask
11/26/1996US5578421 Photomask and pattern forming method employing the same
11/26/1996US5578401 Photomask for the measurement of resolution of exposure equipment
11/26/1996US5578362 Which are flexible, having a work surface and subsurface proximate to it; semiconductors
11/26/1996US5578284 Crystal prepared using the czochralski method
11/26/1996US5578273 Apparatus for continuously controlling the peroxide and ammonia concentration in a bath
11/26/1996US5578261 Method of encapsulating large substrate devices using reservoir cavities for balanced mold filling
11/26/1996US5578193 Semicoductors, electrolysis
11/26/1996US5578186 Method for forming an acrylic resist on a substrate and a fabrication process of an electronic apparatus
11/26/1996US5578167 Substrate holder and method of use
11/26/1996US5578166 Etching a conductive film after forming a mask pattern on metal conductor and ion milling
11/26/1996US5578163 Method of making an aluminum containing interconnect without hardening of a sidewall protection layer
11/26/1996US5578161 Method and apparatus for in-situ and on-line monitoring of trench formation process
11/26/1996US5578151 Manufacture of a multi-layer interconnect structure
11/26/1996US5578142 Solar-cell module and process for producing the same
11/26/1996US5578133 Dry cleaning process for cleaning a surface
11/26/1996US5578131 Fluoropolymers
11/26/1996US5578129 Gas supplying head and load lock chamber of semiconductor processing system
11/26/1996US5578127 System for applying process liquid
11/26/1996US5578126 Lead frame holder
11/26/1996US5577879 Articulated arm transfer device
11/26/1996US5577656 Method of packaging a semiconductor device
11/26/1996US5577621 Wafer installing cassette for semiconductor manufacturing apparatus
11/26/1996US5577616 Cushioning package for transporting or storing semiconductor wafers
11/26/1996US5577610 Casing for frame-supported pellicles
11/26/1996US5577331 Downflow spin dryer
11/26/1996CA2124052C Liquid indium source
11/26/1996CA2095609C Leadless pad array chip carrier
11/25/1996CA2177200A1 Illumination system and method employing a deformable mirror and diffractive optical elements
11/25/1996CA2177199A1 Illumination system having spatially separate vertical and horizontal image planes for use in photolithography
11/25/1996CA2177196A1 Hybrid illumination system for use in photolithography
11/22/1996EP0757835A4 High-speed, non-volatile electrically programmable and erasable cell and method
11/21/1996WO1996036998A1 Method for making direct multistage tft devices with grid-source or drain interconnection
11/21/1996WO1996036993A1 METHOD OF FORMING A Ta2O5 DIELECTRIC LAYER
11/21/1996WO1996036992A1 Semiconductor device and its manufacture
11/21/1996WO1996036991A1 Process for connecting an electric connection of an unpacked ic component to a conductive track on a substrate
11/21/1996WO1996036988A2 Electrostatic discharge protection for an array of macro cells
11/21/1996WO1996036984A1 Electrode clamping assembly and method for assembly and use thereof
11/21/1996WO1996036884A1 Method and device for making connection
11/21/1996WO1996036496A1 Semiconductor device
11/21/1996WO1996036459A1 Improved method and apparatus for chemical mechanical polishing
11/21/1996WO1996036456A1 Ic package processing and measuring method and apparatus therefor