Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
07/2013
07/16/2013US8487373 SONOS memory cells having non-uniform tunnel oxide and methods for fabricating same
07/16/2013US8487371 Vertical MOSFET transistor having source/drain contacts disposed on the same side and method for manufacturing the same
07/16/2013US8487370 Trench semiconductor device and method of manufacturing
07/16/2013US8487369 Semiconductor device with buried gates and buried bit lines and method for fabricating the same
07/16/2013US8487368 Low voltage power MOSFET device and process for its manufacture
07/16/2013US8487364 Nonvolatile semiconductor memory device and method for manufacturing same
07/16/2013US8487356 Graphene device and method of manufacturing the same
07/16/2013US8487355 Structure and method for compact long-channel FETs
07/16/2013US8487345 Information recording and reproducing device
07/16/2013US8487340 Optoelectronic device based on nanowires and corresponding processes
07/16/2013US8487333 LED package and method for manufacturing the same
07/16/2013US8487325 Light emitting diode with large viewing angle and fabricating method thereof
07/16/2013US8487319 Diamond semiconductor element and process for producing the same
07/16/2013US8487307 Semiconductor component including a lateral transistor component
07/16/2013US8487305 Semiconductor device and method of manufacturing the same
07/16/2013US8487300 Organic electroluminescent devices comprising azomethine-metal complexes
07/16/2013US8487293 Bipolar switching memory cell with built-in “on ”state rectifying current-voltage characteristics
07/16/2013US8486845 Plasma enhanced atomic layer deposition system and method
07/16/2013US8486844 Method and system for isolated and discretized process sequence integration
07/16/2013US8486843 Method of forming nanoscale three-dimensional patterns in a porous material
07/16/2013US8486842 Method of selectively removing patterned hard mask
07/16/2013US8486841 Corrosion resistant component of semiconductor processing equipment and method of manufacture thereof
07/16/2013US8486840 Inverse spacer processing
07/16/2013US8486839 Methods and apparatus to improve reliability of isolated vias
07/16/2013US8486838 Method for forming a fine pattern using isotropic etching
07/16/2013US8486837 Polishing slurry for metal, and polishing method
07/16/2013US8486836 Semiconductor device and method of manufacturing the same
07/16/2013US8486835 Czochralski growth of randomly oriented polysilicon and use of randomly oriented polysilicon dummy wafers
07/16/2013US8486834 Method for manufacturing memory device
07/16/2013US8486833 Fabrication of conductive pathways, microcircuits and microstructures in microfluidic networks
07/16/2013US8486832 Method for fabricating semiconductor device
07/16/2013US8486831 Semiconductor device manufacturing method
07/16/2013US8486830 Via forming method and method of manufacturing multi-chip package using the same
07/16/2013US8486829 Semiconductor element having a conductive via and method for making the same and package having a semiconductor element with a conductive via
07/16/2013US8486828 Semiconductor device manufacturing method
07/16/2013US8486827 Device of filling metal in through-via-hole of semiconductor wafer and method using the same
07/16/2013US8486826 Process of forming a grid electrode on the front-side of a silicon wafer
07/16/2013US8486825 Methods of forming semiconductor device packages including a semiconductor device and a redistribution element, methods of forming redistribution elements and methods for packaging semiconductor devices
07/16/2013US8486824 Enhancing metal/low-K interconnect reliability using a protection layer
07/16/2013US8486823 Methods of forming through via
07/16/2013US8486822 Semiconductor device having dummy pattern and the method for fabricating the same
07/16/2013US8486821 Method and apparatus for variable conductance
07/16/2013US8486820 Semiconductor device manufacturing method
07/16/2013US8486819 Semiconductor device and method of manufacturing the same
07/16/2013US8486818 Semiconductor devices including buried gate electrodes and isolation layers and methods of forming semiconductor devices including buried gate electrodes and isolation layers using self aligned double patterning
07/16/2013US8486817 Method for forming an integrated circuit level by sequential tridimensional integration
07/16/2013US8486816 Diamond semiconductor element and process for producing the same
07/16/2013US8486814 Wafer backside defectivity clean-up utilizing selective removal of substrate material
07/16/2013US8486813 Silicon wafer and fabrication method thereof
07/16/2013US8486812 Fabrication method for polycrystalline silicon thin film and display device fabricated using the same
07/16/2013US8486811 Semiconductor device and manufacturing process therefor
07/16/2013US8486810 Method for fabricating a substrate provided with two active areas with different semiconductor materials
07/16/2013US8486809 Method for forming laminated resin film and method for producing semiconductor device
07/16/2013US8486808 Manufacturing method of semiconductor device having vertical transistor
07/16/2013US8486807 Realizing N-face III-nitride semiconductors by nitridation treatment
07/16/2013US8486806 Method for machining wafers by cutting partway through a peripheral surplus region to form break starting points
07/16/2013US8486805 Through-silicon via and method for forming the same
07/16/2013US8486804 Semiconductor device
07/16/2013US8486803 Wafer level packaging method of encapsulating the bottom and side of a semiconductor chip
07/16/2013US8486802 Method of manufacturing semiconductor device having shared bit line structure
07/16/2013US8486801 Fabricating method of DRAM structure
07/16/2013US8486800 Trench capacitor and method for producing the same
07/16/2013US8486799 Method for manufacturing solid electrolytic capacitor
07/16/2013US8486798 Variable capacitance chamber component incorporating a semiconductor junction and methods of manufacturing and using thereof
07/16/2013US8486797 Bipolar junction transistor with epitaxial contacts
07/16/2013US8486796 Thin film resistors and methods of manufacture
07/16/2013US8486795 Method of fabricating transistors
07/16/2013US8486794 Method for manufacturing semiconductor structure
07/16/2013US8486793 Method for manufacturing semiconductor device with semiconductor materials with different lattice constants
07/16/2013US8486792 Film forming method of silicon oxide film, silicon oxide film, semiconductor device, and manufacturing method of semiconductor device
07/16/2013US8486791 Mufti-layer single crystal 3D stackable memory
07/16/2013US8486790 Manufacturing method for metal gate
07/16/2013US8486789 Method for manufacturing insulated gate field effect transistor
07/16/2013US8486788 Semiconductor device and method for fabricating the same
07/16/2013US8486787 Method of fabricating semiconductor device
07/16/2013US8486786 Enhancing uniformity of a channel semiconductor alloy by forming STI structures after the growth process
07/16/2013US8486785 Surround gate CMOS semiconductor device
07/16/2013US8486784 Vertical semiconductor device and method of manufacturing the same
07/16/2013US8486783 Semiconductor device and method of manufacturing the same
07/16/2013US8486782 Flash memory devices and methods for fabricating the same
07/16/2013US8486781 Method of manufacturing flash memory device
07/16/2013US8486780 Doped electrode for dram applications
07/16/2013US8486778 Low resistance source and drain extensions for ETSOI
07/16/2013US8486777 Method for manufacturing microcrystalline semiconductor and thin film transistor
07/16/2013US8486776 Strained devices, methods of manufacture and design structures
07/16/2013US8486775 Thin film transistor array panel and method for manufacturing the same
07/16/2013US8486774 Thin film transistor and display device
07/16/2013US8486773 Semiconductor device and manufacturing method thereof
07/16/2013US8486772 Method of manufacturing SOI substrate
07/16/2013US8486771 Methods of forming relaxed layers of semiconductor materials, semiconductor structures, devices and engineered substrates including same
07/16/2013US8486770 Method of forming CMOS FinFET device
07/16/2013US8486768 Semiconductor device comprising high-k metal gate electrode structures and precision eFuses formed in the active semiconductor material
07/16/2013US8486767 Interconnects with improved electromigration reliability
07/16/2013US8486766 Method for thermally contacting opposing electrical connections of a semiconductor component arrangement
07/16/2013US8486765 Structure and process for electrical interconnect and thermal management
07/16/2013US8486764 Wafer level package and fabrication method
07/16/2013US8486763 Method for thinning and dicing electronic circuit wafers
07/16/2013US8486762 Leadless array plastic package with various IC packaging configurations
07/16/2013US8486761 Hybrid combination of substrate and carrier mounted light emitting devices
07/16/2013US8486759 Method for forming terminal of stacked package element and method for forming stacked package