Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
07/2013
07/09/2013US8481342 Method of manufacturing semiconductor device, semiconductor device and semiconductor composite device
07/09/2013US8481341 Epitaxial film growth in retrograde wells for semiconductor devices
07/09/2013US8481340 Method for preparing a light-emitting device using gas cluster ion beam processing
07/09/2013US8481339 Magnetic memory and manufacturing method thereof
07/09/2013US8481338 ALD processing techniques for forming non-volatile resistive-switching memories
07/09/2013US8481247 Resist underlayer film forming composition containing liquid additive
07/09/2013US8481244 Epoxy-containing polymer, photo-curable resin composition, patterning process, and electric/electronic part protective film
07/09/2013US8481163 Carbon nanotube growth method
07/09/2013US8481162 Stabilized semiconductor nanocrystals comprising a coating of polydentate ligand
07/09/2013US8481142 System and method for monitoring chloride content and concentration induced by a metal etch process
07/09/2013US8481123 Method for high pressure gas annealing
07/09/2013US8481119 Bisamineazaallylic ligands and their use in atomic layer deposition methods
07/09/2013US8480926 Liquid-crystalline compound and organic semiconductor device containing the compound
07/09/2013US8480850 Plasma treatment system
07/09/2013US8480849 Substrate processing apparatus and electrode structure
07/09/2013US8480848 Plasma processing apparatus
07/09/2013US8480847 Processing system
07/09/2013US8479681 Single-shot semiconductor processing system and method having various irradiation patterns
07/09/2013CA2484653C Method and apparatus for two dimensional assembly of particles
07/04/2013WO2013102146A1 Die up fully molded fan-out wafer level packaging
07/04/2013WO2013102137A2 Fully molded fan-out
07/04/2013WO2013102022A1 Vacuum effector and method of use
07/04/2013WO2013101907A1 Compositions and methods for selectively etching titanium nitride
07/04/2013WO2013101851A1 System architecture for combined static and pass-by processing
07/04/2013WO2013101790A2 Finfet with merged fins and vertical silicide
07/04/2013WO2013101670A1 Plasma activation systems
07/04/2013WO2013101423A1 Zero shrinkage smooth interface oxy-nitride and oxy-amorphous-silicon stacks for 3d memory vertical gate application
07/04/2013WO2013101274A1 Increasing masking layer etch rate and selectivity
07/04/2013WO2013101243A1 High density package interconnects
07/04/2013WO2013101241A1 Organic thin film passivation of metal interconnections
07/04/2013WO2013101239A1 Increasing current carrying capability through direct liquid cooling of test contacts
07/04/2013WO2013101238A1 Test probes
07/04/2013WO2013101237A1 Hard mask etch stop for tall fins
07/04/2013WO2013101230A1 Variable gate width for gate all-around transistors
07/04/2013WO2013101226A1 Apparatus and method for automated sort probe assembly and repair
07/04/2013WO2013101219A1 Wrap-around trench contact structure and methods of fabrication
07/04/2013WO2013101204A1 Self-enclosed asymmetric interconnect structures
07/04/2013WO2013101203A1 Balancing energy barrier between states in perpendicular magnetic tunnel junctions
07/04/2013WO2013101202A1 Techniques for phase tuning for process optimization
07/04/2013WO2013101172A1 Compound tunneling field effect transistor integrated on silicon substrate and method for fabricating the same
07/04/2013WO2013101115A1 Defective artifact removal in photolithography masks corrected for optical proximity
07/04/2013WO2013101109A1 Sub-second annealing lithography techniques
07/04/2013WO2013101108A1 Pattern decomposition lithography techniques
07/04/2013WO2013101107A1 Double patterning lithography techniques
07/04/2013WO2013101105A1 Spacer assisted pitch division lithography
07/04/2013WO2013101096A1 Airgap interconnect with hood layer and method of forming
07/04/2013WO2013101028A1 Avd hardmask for damascene patterning
07/04/2013WO2013101007A1 Methods of integrating multiple gate dielectric transistors on a tri-gate (finfet) process
07/04/2013WO2013101004A1 Contact techniques and configurations for reducing parasitic resistance in nanowire transistors
07/04/2013WO2013101003A1 Techniques and configurations for stacking transistors of an integrated circuit device
07/04/2013WO2013101001A1 Methods of forming hetero-layers with reduced surface roughness and bulk defect density on non-native surfaces and the structures formed thereby
07/04/2013WO2013100995A1 Photonic package architecture
07/04/2013WO2013100955A1 Annealing a sacrificial layer
07/04/2013WO2013100951A1 Backside bulk silicon mems
07/04/2013WO2013100917A1 Optical transmission of test data for testing integrated circuits
07/04/2013WO2013100914A1 Methods to enhance doping concentration in near-surface layers of semiconductors and methods of making same
07/04/2013WO2013100913A1 Transient thermal management systems for semiconductor devices
07/04/2013WO2013100906A1 Carbon nanotube semiconductor devices and deterministic nanofabrication methods
07/04/2013WO2013100897A1 Damage monitor structure for through-silicon via (tsv) arrays
07/04/2013WO2013100894A1 Method of forming low resistivity tanx/ta diffusion barriers for backend interconnects
07/04/2013WO2013100644A1 Etching-solution composition and wet etching method using same
07/04/2013WO2013100449A1 Silicon carbide epitaxial wafer and method for fabricating the same
07/04/2013WO2013100294A1 Apparatus for fabricating ingot and method of fabricating ingot
07/04/2013WO2013100158A1 Actinic ray-sensitive or radiation-sensitive resin composition, and, actinic ray-sensitive or radiation-sensitive film and pattern forming method, each using the same
07/04/2013WO2013099662A1 Actinic ray-sensitive or radiation-sensitive resin composition, and, resist film, pattern forming method, electronic device manufacturing method, and electronic device, each using the composition
07/04/2013WO2013098794A2 Nickel allyl amidinate precursors for deposition of nickel-containing films
07/04/2013WO2013098657A1 Nanostructure and process of fabricating same
07/04/2013WO2013097915A1 Device and method for producing an analogue control signal
07/04/2013WO2013049578A4 Group iii-v substrate material with particular crystallographic features and methods of making
07/04/2013WO2013048155A3 Method for forming fine patterns of semiconductor device using directed self assembly process
07/04/2013WO2013043730A3 Electrical contacts to nanostructured areas
07/04/2013WO2013039645A3 Integrated building based air handler for server farm cooling system
07/04/2013WO2013006241A4 Pedestal with edge gas deflector for edge profile control
07/04/2013WO2013002941A8 Integrated circuit comprising a mosfet having ballast resistors and corresponding manufacturing method
07/04/2013WO2012125560A3 Method and apparatus for plasma dicing a semi-conductor wafer
07/04/2013WO2011119819A3 Implant alignment through a mask
07/04/2013US20130174105 Method and apparatus for plasma processing
07/04/2013US20130171839 C-rich carbon boron nitride dielectric films for use in electronic devices
07/04/2013US20130171838 Method of manufacturing semiconductor device, method of processing substrate, substrate processing apparatus, and non-transitory computer-readable recording medium
07/04/2013US20130171837 Semiconductor process
07/04/2013US20130171836 Method for surface treatment on a metal oxide and method for preparing a thin film transistor
07/04/2013US20130171835 Composition for water-repellent treatment of surface, and method for water-repellent treatment of surface of semiconductor substrate using same
07/04/2013US20130171834 In-situ deposition of film stacks
07/04/2013US20130171833 Methods and apparatus for wetting pretreatment for through resist metal plating
07/04/2013US20130171832 Enhanced Isolation For Combinatorial Atomic Layer Deposition (ALD)
07/04/2013US20130171831 Substrate processing apparatus and substrate processing method
07/04/2013US20130171830 Method for removing germanium suboxide
07/04/2013US20130171829 Titanium-Nitride Removal
07/04/2013US20130171828 Processing liquid for suppressing pattern collapse of microstructure, and method for producing microstructure using same
07/04/2013US20130171827 Method and apparatus for manufacturing three-dimensional-structure memory device
07/04/2013US20130171826 Semiconductor device production method and rinse
07/04/2013US20130171825 Photoresist pattern trimming methods
07/04/2013US20130171824 Process for chemically mechanically polishing substrates containing silicon oxide dielectric films and polysilicon and/or silicon nitride films
07/04/2013US20130171823 CMP Slurry Composition and Polishing Method Using the Same
07/04/2013US20130171822 Tungsten feature fill with nucleation inhibition
07/04/2013US20130171821 Method of fabricating metal contact using double patterning technology and device formed thereby
07/04/2013US20130171820 Methods for three-dimensional integrated circuit through hole via gapfill and overburden removal
07/04/2013US20130171819 Methods for integration of metal/dielectric interconnects
07/04/2013US20130171818 Method of Manufacturing A Semiconductor Device
07/04/2013US20130171817 Structure and method for reducing vertical crack propagation