Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
06/2004
06/24/2004WO2004053905A2 Dye sensitized solar cells having foil electrodes
06/24/2004WO2004053822A2 Display pixel, display apparatus having an image pixel and method of manufacturing display device
06/24/2004WO2004053816A1 Light-emitting device and its fabricating method
06/24/2004WO2004053595A1 Positive type photoresist composition for lcd production and method of forming resist pattern
06/24/2004WO2004053585A1 Thin film transistor substrate, method of manufacturing the same, liquid crystal display apparatus having the same and method of manufacturing the liquid crystal display apparatus
06/24/2004WO2004053508A1 Inspection method and inspection equipment
06/24/2004WO2004053456A2 Method using multi-component colloidal abrasives for cmp processing of semiconductor and optical materials
06/24/2004WO2004053210A1 A substrate for epitaxy and a method of preparing the same
06/24/2004WO2004053209A1 A template type substrate and a method of preparing the same
06/24/2004WO2004053191A1 Copper activator solution and method for semiconductor seed layer enhancement
06/24/2004WO2004053189A1 Support system for a treatment apparatus
06/24/2004WO2004053188A1 Susceptor system
06/24/2004WO2004053187A1 Susceptor system________________________
06/24/2004WO2004053045A1 Cleaning agent composition, cleaning and production methods for semiconductor wafer, and semiconductor wafer
06/24/2004WO2004053008A2 Passivative chemical mechanical polishing composition for copper film planarization
06/24/2004WO2004052785A2 High purity nickel/vanadium sputtering components; and methods of making sputtering components
06/24/2004WO2004052642A1 CONDUCTIVE SHEET HAVING CONDUCTIVE LAYER ON Si-CONTAINING LAYER
06/24/2004WO2004052586A1 Device and method for laser processing
06/24/2004WO2004052547A2 Coated and magnetic particles and applications thereof
06/24/2004WO2004052411A1 Workpiece processing system
06/24/2004WO2004047150A3 RELAXED SiGe LAYERS ON Si OR SILICON-ON-INSULATOR SUBSTRATES BY ION IMPLANTATION AND THERMAL ANNEALING
06/24/2004WO2004040476A9 Manufacturing process of detachable substrates
06/24/2004WO2004038809A3 Formation of contacts on semiconductor substrates
06/24/2004WO2004037878A3 Co-curable compositions
06/24/2004WO2004036611A3 Neutral particle beam processing apparatus with enhanced conversion performance from plasma ions to neutral particles
06/24/2004WO2004032160A3 Methods and systems for processing a substrate using a dynamic liquid meniscus
06/24/2004WO2004030084A3 Method for quantifying uniformity patterns and inclusion of expert knowledge for tool development and control
06/24/2004WO2004026757A3 Controlling electromechanical behavior of structures within a microelectromechanical systems device
06/24/2004WO2004017373A9 Complementary analog bipolar transistors with trench-constrained isolation diffusion
06/24/2004WO2004012235A3 Atmospheric pressure plasma processing reactor
06/24/2004WO2004012220A3 Methods and apparatus for monitoring plasma parameters in plasma doping systems
06/24/2004WO2004010464B1 Methods of electrochemically treating semiconductor substrates, and methods of forming capacitor constructions
06/24/2004WO2004006297A3 Low dielectric materials and methods of producing same
06/24/2004WO2004003938A3 Low dielectric constant films derived by sol-gel processing of a hyperbranched polycarbosilane
06/24/2004WO2003104929A3 Use of overlay diagnostics for enhanced automatic process control
06/24/2004WO2003098664A3 Method for co-fabricating strained and relaxed crystalline and poly-crystalline structures
06/24/2004WO2003096352A3 Ferroelectric memory
06/24/2004WO2003058680A3 Supercritical fluid-assisted deposition of materials on semiconductor substrates
06/24/2004WO2003048981A3 Improving integrated circuit performance and reliability using a patterned bump layout on a power grid
06/24/2004WO2003036729A8 Delta doped silicon carbide metal-semiconductor field effect transistors and methods of fabricating them
06/24/2004WO2003008940A9 Confocal 3d inspection system and process
06/24/2004WO2002073122A9 Cyclic error reduction in average interferometric position measurements
06/24/2004WO1999064780A9 Chemical delivery system having purge system utilizing multiple purge techniques
06/24/2004US20040123267 Computer data analyzing method, based on a computer program, with setting values of light exposure and focus positions, forming pattern on substrate to be exposed to light, measure pattern dimensions, calculation
06/24/2004US20040123262 Automatic placement and routing system
06/24/2004US20040123182 Parallel fault detection
06/24/2004US20040122859 System to identify a wafer manufacturing problem and method therefor
06/24/2004US20040122624 Semiconductor wafer inspecting method
06/24/2004US20040122605 User interface for semiconductor evaluator
06/24/2004US20040122601 Processing tester information by trellising in integrated circuit technology development
06/24/2004US20040122599 Real time analysis of periodic structures on semiconductors
06/24/2004US20040122548 Storage, measurement, calibration; using computers
06/24/2004US20040122545 Substrate processing apparatus, operation method thereof and program
06/24/2004US20040122536 Precision positioning device and processing machine using the same
06/24/2004US20040122141 Composite media for ion processing and a method for making the composite media
06/24/2004US20040121937 Cleaning liquid used in process for forming dual damascene structure and a process for treating substrate therewith
06/24/2004US20040121714 Polishing cloth and method of producing same
06/24/2004US20040121709 Deformable pad for chemical mechanical polishing
06/24/2004US20040121708 Pad assembly for electrochemical mechanical processing
06/24/2004US20040121704 Vertically adjustable chemical mechanical polishing head having a pivot mechanism and method for use thereof
06/24/2004US20040121621 Method of forming a cap layer having anti-reflective characteristics on top of a low-k dielectric
06/24/2004US20040121620 Surface preparation prior to deposition
06/24/2004US20040121618 Spin-on adhesive for temporary wafer coating and mounting to support wafer thinning and backside processing
06/24/2004US20040121617 Method of processing a substrate, heating apparatus, and method of forming a pattern
06/24/2004US20040121616 Method for bottomless deposition of barrier layers in integrated circuit metallization schemes
06/24/2004US20040121615 Method of forming fine patterns
06/24/2004US20040121614 Method for forming pattern using printing process
06/24/2004US20040121613 Estimation of remaining film thickness distribution, correction of patterning and insulation film removing masks with remaining film thickness distribution, and production of semiconductor device with corrected patterning and insulation film removing masks
06/24/2004US20040121612 Methods of forming semiconductor devices using an etch stop layer
06/24/2004US20040121611 Method of cutting semiconductor wafer and protective sheet used in the cutting method
06/24/2004US20040121609 Method for forming silicon epitaxial layer
06/24/2004US20040121608 Sidewall coverage for copper damascene filling
06/24/2004US20040121607 Method of producing a semiconductor integrated circuit device and the semiconductor integrated circuit device
06/24/2004US20040121606 Flip-chip structure and method for high quality inductors and transformers
06/24/2004US20040121605 Method and apparatus to improve thickness uniformity of surfaces for integrated device manufacturing
06/24/2004US20040121604 Method of etching a low-k dielectric layer
06/24/2004US20040121603 Advanced control for plasma process
06/24/2004US20040121600 Method of wet etching a silicon and nitrogen containing material
06/24/2004US20040121599 Simultaneous formation of device and backside contacts on wafers having a buried insulator layer
06/24/2004US20040121598 Method and apparatus for planarization of a material by growing a sacrificial film with customized thickness profile
06/24/2004US20040121597 Patterning method for fabricating integrated circuit
06/24/2004US20040121596 Source alternating MOCVD processes to deposit tungsten nitride thin films as barrier layers for MOCVD copper interconnects
06/24/2004US20040121595 Method of forming a metal film, semiconductor device and wiring board
06/24/2004US20040121594 Process for forming a pattern
06/24/2004US20040121593 Method for manufacturing semiconductor device through use of mask material
06/24/2004US20040121592 Method for fabricating metal silicide
06/24/2004US20040121591 Fabrication method of semiconductor integrated circuit device
06/24/2004US20040121590 Method of forming a contact hole of a semiconductor device
06/24/2004US20040121589 Process for contact opening definition for active element electrical connections
06/24/2004US20040121588 Method of forming dual damascene pattern in semiconductor device
06/24/2004US20040121587 Semiconductor device and method of fabricating the same
06/24/2004US20040121586 Barrier film integrity on porous low k dielectrics by application of a hydrocarbon plasma treatment
06/24/2004US20040121585 Integrated circuit with simultaneous fabrication of dual damascene via and trench
06/24/2004US20040121584 Method of manufacturing a semiconductor device
06/24/2004US20040121583 Method for forming capping barrier layer over copper feature
06/24/2004US20040121582 Method of manufacturing a semiconductor device
06/24/2004US20040121581 Method of forming dual-damascene structure
06/24/2004US20040121580 Method for fabricating metal line of semiconductor device
06/24/2004US20040121579 Mask layer and dual damascene interconnect structure in a semiconductor device
06/24/2004US20040121578 Method of forming a dual damascene pattern in a semiconductor device