H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof

Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
08/2004
08/24/2004	US6781174 Magnetoresistive memory device assemblies
08/24/2004	US6781172 Semiconductor device with adhesion-improvement capacitor and process for producing the device
08/24/2004	US6781171 Pinned photodiode for a CMOS image sensor and fabricating method thereof
08/24/2004	US6781168 Semiconductor device
08/24/2004	US6781165 Hetero-junction bipolar transistor with gold out-diffusion barrier made from InP or InGaP
08/24/2004	US6781164 Semiconductor element
08/24/2004	US6781163 Heterojunction field effect transistor
08/24/2004	US6781156 Incorporation of charge carrier lifetime controlling impurities into semiconductor power devices
08/24/2004	US6781155 Electroluminescence display device with a double gate type thin film transistor having a lightly doped drain structure
08/24/2004	US6781154 Semiconductor apparatus
08/24/2004	US6781153 Contact between element to be driven and thin film transistor for supplying power to element to be driven
08/24/2004	US6781152 Semiconductor device with light emitting elements and an adhesive layer holding color filters
08/24/2004	US6781150 Test structure for detecting bonding-induced cracks
08/24/2004	US6781125 Method and apparatus for processing a micro sample
08/24/2004	US6781093 Circuit singulation system and method
08/24/2004	US6781089 Method and apparatus for cutting electrical wiring line on a substrate, and method and apparatus for manufacturing electronic device
08/24/2004	US6781086 Method for removing photoresist
08/24/2004	US6781066 Packaged microelectronic component assemblies
08/24/2004	US6781065 Solder-coated articles useful for substrate attachment
08/24/2004	US6781064 Printed circuit boards for electronic device packages having glass free non-conductive layers and method of forming same
08/24/2004	US6780953 Organic polymer for anti-reflective coating layer and preparation thereof
08/24/2004	US6780796 Method of forming relaxed SiGe layer
08/24/2004	US6780795 Heat treatment apparatus for preventing an initial temperature drop when consecutively processing a plurality of objects
08/24/2004	US6780793 Production method of semiconductor device
08/24/2004	US6780792 Semiconductor circuit constructions, capacitor constructions, and methods of forming semiconductor circuit constructions and capacitor constructions
08/24/2004	US6780790 Semiconductor device and method of manufacturing the same
08/24/2004	US6780789 Laser thermal oxidation to form ultra-thin gate oxide
08/24/2004	US6780788 Methods for improving within-wafer uniformity of gate oxide
08/24/2004	US6780787 Low contamination components for semiconductor processing apparatus and methods for making components
08/24/2004	US6780786 Method for producing a porous silicon film
08/24/2004	US6780785 Self-aligned structure with unique erasing gate in split gate flash
08/24/2004	US6780784 Etchant is hydrogen peroxide (h2o2), and a mixed solution including at least one of an organic acid, an inorganic acid, and a neutral salt; for liquid crystal display devices having copper lines
08/24/2004	US6780783 Method of wet etching low dielectric constant materials
08/24/2004	US6780782 Bi-level resist structure and fabrication method for contact holes on semiconductor substrates
08/24/2004	US6780781 Method for manufacturing an electronic device
08/24/2004	US6780780 Method for removing Si-needles of wafer
08/24/2004	US6780779 Method of fabricating semiconductor device
08/24/2004	US6780778 Method for fabricating semiconductor device
08/24/2004	US6780777 Method for forming metal layer of semiconductor device
08/24/2004	US6780776 Nitride offset spacer to minimize silicon recess by using poly reoxidation layer as etch stop layer
08/24/2004	US6780775 Design of lithography alignment and overlay measurement marks on CMP finished damascene surface
08/24/2004	US6780774 Method of semiconductor device isolation
08/24/2004	US6780773 Method of chemical mechanical polishing with high throughput and low dishing
08/24/2004	US6780772 Method and system to provide electroplanarization of a workpiece with a conducting material layer
08/24/2004	US6780771 Forming a substantially planar upper surface at the outer edge of a semiconductor topography
08/24/2004	US6780770 Method for stacking semiconductor die within an implanted medical device
08/24/2004	US6780769 Method of manufacturing structure for connecting interconnect lines including metal layer with thickness larger than thickness of metallic compound layer
08/24/2004	US6780768 Bonding pad for optical semiconductor device and fabrication method thereof
08/24/2004	US6780767 Semiconductor component in a wafer assembly
08/24/2004	US6780766 Methods of forming regions of differing composition over a substrate
08/24/2004	US6780765 Integrated circuit trenched features and method of producing same
08/24/2004	US6780764 Method of forming a patterned tungsten damascene interconnect
08/24/2004	US6780763 Method for fabricating semiconductor device capable of improving gap-fill property
08/24/2004	US6780762 Self-aligned, integrated circuit contact and formation method
08/24/2004	US6780761 Via-first dual damascene process
08/24/2004	US6780760 Methods for manufacturing semiconductor devices
08/24/2004	US6780759 Method for multi-frequency bonding
08/24/2004	US6780758 Method of establishing electrical contact between a semiconductor substrate and a semiconductor device
08/24/2004	US6780757 Semiconductor integrated circuit device and method for making the same
08/24/2004	US6780756 Etch back of interconnect dielectrics
08/24/2004	US6780755 Gas dome dielectric system for ULSI interconnects
08/24/2004	US6780753 Airgap for semiconductor devices
08/24/2004	US6780752 Metal thin film of semiconductor device and method for forming same
08/24/2004	US6780751 Method for eliminating voiding in plated solder
08/24/2004	US6780750 Photodiode for ultra high speed optical communication and fabrication method therefor
08/24/2004	US6780749 Method of manufacturing a semiconductor chip comprising multiple bonding pads in staggard rows on edges
08/24/2004	US6780748 Method of fabricating a wafer level chip size package utilizing a maskless exposure
08/24/2004	US6780747 Methods for providing void-free layers for semiconductor assemblies
08/24/2004	US6780746 Method for fabricating a chip scale package using wafer level processing and devices resulting therefrom
08/24/2004	US6780745 Semiconductor integrated circuit and method of manufacturing the same
08/24/2004	US6780744 Stereolithographic methods for securing conductive elements to contacts of semiconductor device components
08/24/2004	US6780743 Method of forming a floating gate in a flash memory device
08/24/2004	US6780742 Undulated moat for reducing contact resistance
08/24/2004	US6780741 Method of forming a novel gate electrode structure comprised of a silicon-germanium layer located between random grained polysilicon layers
08/24/2004	US6780740 Method for fabricating a floating gate semiconductor device
08/24/2004	US6780739 Bit line contact structure and method for forming the same
08/24/2004	US6780738 Pattern forming method, method of making microdevice, method of making thin-film magnetic head, method of making magnetic head slider, method of making magnetic head apparatus, and method of making magnetic recording and reproducing apparatus
08/24/2004	US6780737 Method of manufacturing semiconductor device with buried conductive lines
08/24/2004	US6780736 Method for image reversal of implant resist using a single photolithography exposure and structures formed thereby
08/24/2004	US6780735 Method to increase carbon and boron doping concentrations in Si and SiGe films
08/24/2004	US6780734 Wafer table and semiconductor package manufacturing apparatus using the same
08/24/2004	US6780733 Thinned semiconductor wafer and die and corresponding method
08/24/2004	US6780732 DRAM access transistor
08/24/2004	US6780731 HDP gap-filling process for structures with extra step at side-wall
08/24/2004	US6780730 Reduction of negative bias temperature instability in narrow width PMOS using F2 implantation
08/24/2004	US6780728 Semiconductor constructions, and methods of forming semiconductor constructions
08/24/2004	US6780727 Method for forming a MIM (metal-insulator-metal) capacitor
08/24/2004	US6780725 Method for forming a semiconductor device including forming vertical npn and pnp transistors by exposing the epitaxial layer, forming a monocrystal layer and adjusting the impurity concentration in the epitaxial layer
08/24/2004	US6780724 Method of manufacturing a bipolar transistor semiconductor device
08/24/2004	US6780722 Field effect transistor on insulating layer and manufacturing method
08/24/2004	US6780721 Low dielectric constant shallow trench isolation
08/24/2004	US6780720 Method for fabricating a nitrided silicon-oxide gate dielectric
08/24/2004	US6780719 Method for annealing ultra-thin, high quality gate oxide layers using oxidizer/hydrogen mixtures
08/24/2004	US6780718 Transistor structure and method for making same
08/24/2004	US6780717 Semiconductor integrated circuit device and method of manufacturing the same
08/24/2004	US6780715 Method for fabricating merged dram with logic semiconductor device
08/24/2004	US6780714 Semiconductor devices and their manufacture
08/24/2004	US6780713 Process for manufacturing a DMOS transistor
08/24/2004	US6780712 Method for fabricating a flash memory device having finger-like floating gates structure
08/24/2004	US6780710 Method of manufacturing non-volatile read only memory

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