| Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974) |
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| 09/02/2004 | WO2004048923A3 Multibit metal nanocrystal memories and fabrication |
| 09/02/2004 | WO2004044990A8 One transistor dram cell structure and method for forming |
| 09/02/2004 | WO2004034476A8 Flip chip imaging sensor |
| 09/02/2004 | WO2004030051A3 System for substrate processing with meniscus, vacuum, ipa vapor, drying manifold |
| 09/02/2004 | WO2004030038B1 Compositions substrate for removing etching residue and use thereof |
| 09/02/2004 | WO2004023558A3 Flash memory cell and the method of making separate sidewall oxidation |
| 09/02/2004 | WO2004021412A3 Modular substrate gas panel having manifold connections in a common plane |
| 09/02/2004 | WO2004016546A3 Layer system with a silicon layer and a passivation layer, method for production of a passivation layer on a silicon layer and use thereof |
| 09/02/2004 | WO2004010470A8 Method to overcome instability of ultra-shallow semiconductor junctions |
| 09/02/2004 | WO2003107444A3 Light-emitting diode electrode geometry |
| 09/02/2004 | WO2003107443A3 Bonding pad for gallium nitride-based light-emitting device |
| 09/02/2004 | WO2003107442A3 Electrode for p-type gallium nitride-based semiconductors |
| 09/02/2004 | US20040172610 Pitch-based subresolution assist feature design |
| 09/02/2004 | US20040172606 Semiconductor device having embedded array |
| 09/02/2004 | US20040172605 Semiconductor integrated circuit device and design automation apparatus, method and program |
| 09/02/2004 | US20040171714 Fluororubber molded article and method for producing the same |
| 09/02/2004 | US20040171503 Compositions for removing etching residue and use thereof |
| 09/02/2004 | US20040171474 Contains europium calculated as europium oxide; low volume resistivity at room temperature; semiconductors |
| 09/02/2004 | US20040171340 Microporous polishing pads |
| 09/02/2004 | US20040171338 Microporous polishing pads |
| 09/02/2004 | US20040171280 Atomic layer deposition of nanolaminate film |
| 09/02/2004 | US20040171279 Method of low-temperature oxidation of silicon using nitrous oxide |
| 09/02/2004 | US20040171278 Monatomic layer passivation of semiconductor surfaces |
| 09/02/2004 | US20040171277 Method of forming a conductive metal line over a semiconductor wafer |
| 09/02/2004 | US20040171276 Semiconductor device having high-piemittivity insulation film and production method therefor |
| 09/02/2004 | US20040171275 Semiconductor device and a fabrication method thereof |
| 09/02/2004 | US20040171274 Method for formation of hardmask elements during a semiconductor device fabrication process |
| 09/02/2004 | US20040171273 Specimen surface processing apparatus and surface processing method |
| 09/02/2004 | US20040171272 Method of etching metallic materials to form a tapered profile |
| 09/02/2004 | US20040171271 Structure of trench isolation and a method of forming the same |
| 09/02/2004 | US20040171270 Method and apparatus for micromachining using a magnetic field and plasma etching |
| 09/02/2004 | US20040171269 Substrate processing method |
| 09/02/2004 | US20040171268 Feed-through manufacturing method and feed-through |
| 09/02/2004 | US20040171267 Suppressing lithography at a wafer edge |
| 09/02/2004 | US20040171266 Method for operating chemical mechanical polishing ("CMP") tool for the manufacture of semiconductor devices |
| 09/02/2004 | US20040171265 Modular barrier removal polishing slurry |
| 09/02/2004 | US20040171264 Methods of polishing, interconnect-fabrication, and producing semiconductor devices |
| 09/02/2004 | US20040171263 Method for forming fuse integrated with dual damascene process |
| 09/02/2004 | US20040171262 Method for peeling off semiconductor element and method for manufacturing semiconductor device |
| 09/02/2004 | US20040171261 Method of etching a silicon nitride film and method of manufacturing a semiconductor device using the same |
| 09/02/2004 | US20040171260 Line edge roughness control |
| 09/02/2004 | US20040171259 Methods of forming capacitor constructions |
| 09/02/2004 | US20040171258 Method for fabricating a merged semiconductor device |
| 09/02/2004 | US20040171257 Method for reducing free surface roughness of a semiconductor wafer |
| 09/02/2004 | US20040171256 Mask layer and interconnect structure for dual damascene semiconductor manufacturing |
| 09/02/2004 | US20040171254 Dry-etching method |
| 09/02/2004 | US20040171253 Method for preparing gan based compound semiconductor crystal |
| 09/02/2004 | US20040171252 Reduced contamination of tools in semiconductor processing |
| 09/02/2004 | US20040171251 Multilayer copper structure for improving adhesion property |
| 09/02/2004 | US20040171250 Method of preventing diffusion of copper through a tantalum-comprising barrier layer |
| 09/02/2004 | US20040171248 Prevention of post CMP defects in CU/FSG process |
| 09/02/2004 | US20040171247 Methods for making semiconductor structures having high-speed areas and high-density areas |
| 09/02/2004 | US20040171246 Method of improving copper interconnect of semiconductor devices for bonding |
| 09/02/2004 | US20040171245 Method of making an aligned electrode on a semiconductor structure |
| 09/02/2004 | US20040171244 Selective spacer technology to prevent metal oxide formation during polycide reoxidation |
| 09/02/2004 | US20040171243 Method of forming a conductive pattern of a semiconductor device and method of manufacturing a non-volatile semiconductor memory device using the same |
| 09/02/2004 | US20040171242 Manufacturing method for semiconductor device |
| 09/02/2004 | US20040171241 Semiconductor device having gate electrode of polymetal gate structure processed by side nitriding in anmonia atmosphere |
| 09/02/2004 | US20040171240 Transistor having high dielectric constant gate insulating layer and source and drain forming schottky contact with substrate |
| 09/02/2004 | US20040171239 Method of manufacturing semiconductor device having MIM capacitor element |
| 09/02/2004 | US20040171238 Enhanced selectivity for epitaxial deposition |
| 09/02/2004 | US20040171237 Laser irradiation method, laser irradiation apparatus, and method for manufacturing semiconductor device |
| 09/02/2004 | US20040171236 Method for reducing surface roughness of polysilicon films for liquid crystal displays |
| 09/02/2004 | US20040171234 Silicon wafer manufacturing method, silicon epitaxial wafer manufacturing method, and silicon epitaxial wafer |
| 09/02/2004 | US20040171233 Method and apparatus for separating composite member using fluid |
| 09/02/2004 | US20040171232 Method of detaching a thin film at moderate temperature after co-implantation |
| 09/02/2004 | US20040171231 Bonding system and semiconductor substrate manufacturing method |
| 09/02/2004 | US20040171230 Method of making a hybride substrate having a thin silicon carbide membrane layer |
| 09/02/2004 | US20040171229 Reduced mask count buried layer process |
| 09/02/2004 | US20040171228 Production method for simox substrate and simox substrate |
| 09/02/2004 | US20040171227 Semiconductor device with spiral inductor and method for fabricating semiconductor integrated circuit device |
| 09/02/2004 | US20040171226 Isotopically pure silicon-on-insulator wafers and method of making same |
| 09/02/2004 | US20040171225 Method of manufacturing a semiconductor device having improved gate structure, and a semiconductor device manufactured thereby |
| 09/02/2004 | US20040171224 Method for fabricating a semiconductor device having an insulation film with reduced water content |
| 09/02/2004 | US20040171223 Method of selective removal of SiGe alloys |
| 09/02/2004 | US20040171222 System and method for integrating multiple metal gates for CMOS applications |
| 09/02/2004 | US20040171220 Fabrication method for a deep trench isolation structure of a high-voltage device |
| 09/02/2004 | US20040171217 Method of manufacturing a floating gate and method of manufacturing a non-volatile semiconductor memory device comprising the same |
| 09/02/2004 | US20040171216 Flash memory device and a fabrication process thereof, method of forming a dielectric film |
| 09/02/2004 | US20040171214 Capacitor, circuit board, method of formation of capacitor, and method of production of circuit board |
| 09/02/2004 | US20040171213 Selective silicidation scheme for memory devices |
| 09/02/2004 | US20040171212 Method of manufacturing capacitor by performing multi-stepped wet treatment on surface of electrode |
| 09/02/2004 | US20040171211 Method of forming a trench for use in manufacturing a semiconductor device |
| 09/02/2004 | US20040171210 Fabrication method for semiconductor integrated devices |
| 09/02/2004 | US20040171209 Novel masked nitrogen enhanced gate oxide |
| 09/02/2004 | US20040171208 Method of manufacture of programmable conductor memory |
| 09/02/2004 | US20040171207 Anti-type dosage as LDD implant |
| 09/02/2004 | US20040171205 High performance CMOS device structure with mid-gap metal gate |
| 09/02/2004 | US20040171204 Low temperature formation of backside ohmic contacts for vertical devices |
| 09/02/2004 | US20040171203 Agglomeration control using early transition metal alloys |
| 09/02/2004 | US20040171202 Semiconductor device having a shallow trench isolation and method of fabricating the same |
| 09/02/2004 | US20040171201 Low K-gate spacers by fluorine implantation |
| 09/02/2004 | US20040171200 Active matrix substrate for liquid crystal display and its fabrication |
| 09/02/2004 | US20040171199 Method of forming a thin film transistor on a transparent plate |
| 09/02/2004 | US20040171198 Low voltage high density trench-gated power device with uniformly doped channel and its edge termination technique |
| 09/02/2004 | US20040171197 Method for fabricating a high voltage dual gate device |
| 09/02/2004 | US20040171196 Method and apparatus for transferring a thin layer of semiconductor material |
| 09/02/2004 | US20040171195 Semiconductor wafer having a metal silicate dielectric layer with a dopant having dissociable oxygen, particularly CaO or SrO; enhanced electrical properties; CMOS gates, memory cells, and capacitors |
| 09/02/2004 | US20040171193 Semiconductor device and its manufacturing method |
| 09/02/2004 | US20040171191 planarized wire bonding contacts on the die contacts, and a planarized polymer layer encapsulating the wire bonding contacts, which prevents contact between the die encapsulant and the integrated circuits and functions as a stress defect barrier |