Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
06/2006
06/08/2006WO2006060528A2 A method for forming a semiconductor device with gate sidewall apacers of specific dimensions
06/08/2006WO2006060521A1 Thin-film transistors and processes for forming the same
06/08/2006WO2006060520A2 Membrane-limited selective electroplating of a conductive surface
06/08/2006WO2006060466A2 Near single-crystalline, high-carrier-mobility silicon thin film on a polycrystalline/amorphous substrate
06/08/2006WO2006060339A2 Selective epitaxy process with alternating gas supply
06/08/2006WO2006060302A2 Wide bandgap semiconductor lateral trench fet and method of making
06/08/2006WO2006060300A2 Method for forming low defect density alloy layers and structure containing such layers
06/08/2006WO2006060275A2 Fore-line preconditioning for vacuum pumps
06/08/2006WO2006060212A1 A damascene copper wiring image sensor
06/08/2006WO2006060208A2 Double hbt structure
06/08/2006WO2006060134A2 Restricted radiated heating assembly for high temperature processing
06/08/2006WO2006060124A2 Optimization of beam utilization
06/08/2006WO2006060116A2 Multi-bit nanocrystal memory
06/08/2006WO2006060054A1 Hybrid semiconductor-on-insulator and fin-field-effect transistor structures and related methods
06/08/2006WO2006060015A1 Method for forming a photoresist pattern
06/08/2006WO2006059955A1 Plt/pzt ferroelectric structure
06/08/2006WO2006059851A1 Method and apparatus for manufacturing semiconductor
06/08/2006WO2006059760A1 Method for treating development waste liquid
06/08/2006WO2006059750A1 Curable resin composition
06/08/2006WO2006059720A1 Exposure apparatus, exposure method and device manufacturing method
06/08/2006WO2006059706A1 Printed board and designing method therefor and ic package terminal designing method and connecting method therefor
06/08/2006WO2006059647A1 Surface inspection device and surface inspection method
06/08/2006WO2006059641A1 Magnetic memory
06/08/2006WO2006059636A1 Exposure device and device manufacturing method
06/08/2006WO2006059634A1 Stage device and exposure apparatus
06/08/2006WO2006059627A1 Slurry for chemical mechanical polishing, composite particle having inorganic particle coating, method for preparation thereof, chemical mechanical polishing method and method for manufacturing electronic device
06/08/2006WO2006059625A1 Device processing system, information display method, program, and recording medium
06/08/2006WO2006059615A1 Method and apparatus for evaluating solar cell and use thereof
06/08/2006WO2006059602A1 Method of forming film, film forming apparatus and storage medium
06/08/2006WO2006059589A1 Packaged stacked semiconductor device and method for manufacturing same
06/08/2006WO2006059586A1 Method for manufacturing direct bond wafer, and direct bond wafer
06/08/2006WO2006059580A1 Mold and process for production of substrates having transferred micropatterns thereon
06/08/2006WO2006059569A1 Positive resist composition and method of forming resist pattern
06/08/2006WO2006059559A1 Magnetic random access memory, operation method thereof, and manufacturing method thereof
06/08/2006WO2006059555A1 Composition for forming antireflection film, layered product, and method of forming resist pattern
06/08/2006WO2006059554A1 Semiconductor device
06/08/2006WO2006059549A1 Illumination optical device, manufacturing method thereof, exposure device, and exposure method
06/08/2006WO2006059537A1 Process for producing abrasive material, abrasive material produced by the same, and process for producing silicon wafer
06/08/2006WO2006059457A1 Alignment device
06/08/2006WO2006059452A1 Method for forming photoresist pattern using double layer antireflection film
06/08/2006WO2006059438A1 Voltage generating circuit, constant current circuit and light emitting diode driving circuit
06/08/2006WO2006059382A1 Surface treating apparatus for square wafer for solar battery
06/08/2006WO2006059377A1 Semiconductor device, manufacturing method thereof and photomask
06/08/2006WO2006059376A1 Semiconductor memory and manufacturing method thereof
06/08/2006WO2006059368A1 Semiconductor storage device and manufacturing method thereof
06/08/2006WO2006059361A1 Nonvolatile storage and its manufacturing method
06/08/2006WO2006059330A2 Reflective optical system
06/08/2006WO2006059262A1 An integration method for conductive interconnects
06/08/2006WO2006059261A2 A method of forming an interconnect structure on an integrated circuit die
06/08/2006WO2006059143A1 Patterning techniques
06/08/2006WO2006058882A1 Biochemical semiconductor chip laboratory comprising a coupled address and control chip and method for producing the same
06/08/2006WO2006058850A1 Metallised film for sheet contacting
06/08/2006WO2006058847A1 Method and device for the deposition of gallium nitrite layers on a sapphire substrate and associated substrate holder
06/08/2006WO2006058799A1 Envelopment of components arranged on a substrate
06/08/2006WO2006058594A2 Multiple mask and method for producing differently doped regions
06/08/2006WO2006058504A1 Chemical mechanical polishing method and polishing composition
06/08/2006WO2006041530A3 Work-piece processing system
06/08/2006WO2006040165A3 Method for production of charge-trapping memory cells
06/08/2006WO2006037844A3 Cvd doped structures
06/08/2006WO2006036869A3 Flash lamp annealing apparatus
06/08/2006WO2006025998A3 Programming and erasing structure for an nvm cell
06/08/2006WO2006022651A8 System for and method of ensuring accurate shadow mask-to-substrate registration in a deposition process
06/08/2006WO2006010289A3 Method for separating circuit units (chips) arranged on a semiconductor wafer
06/08/2006WO2006004744A3 Method of determining the correct average bias compensation voltage during a plasma process
06/08/2006WO2005124827A3 Improved method and apparatus for the etching of microstructures
06/08/2006WO2005112122A3 Nanowire varactor diode and methods of making same
06/08/2006WO2005104226A3 Method for production of through-contacts in a plastic mass and semiconductor component with said through contacts
06/08/2006WO2005104225A3 Method for forming a semiconductor device having a notched control electrode and structure thereof
06/08/2006WO2005101492A3 Stacked die bga or lga component assembly
06/08/2006WO2005087983A3 Alternative methods for fabrication of substrates and heterostructures made of silicon compounds and alloys
06/08/2006WO2005081748A3 Semiconductor structure having strained semiconductor and method therefor
06/08/2006WO2005081069A8 Method to determine the value of process parameters based on scatterometry data
06/08/2006WO2005073430A3 Apparatus for electroless deposition of metals onto semiconductor substrates
06/08/2006WO2005057619A3 An electronic device comprising enhancement mode phemt devices, depletion mode phemt devices, and power phemt devices on a single substrate and method of creation
06/08/2006WO2005053083A3 Tunable dielectric device and process relating thereto
06/08/2006WO2005052991A3 High k dielectric film
06/08/2006US20060123380 Computer automated method for designing an integrated circuit, a computer automated system for designing an integrated circuit, and a method of manufacturing an integrated circuit
06/08/2006US20060123372 Semiconductor integrated circuit device having clock signal transmission line and wiring method thereof
06/08/2006US20060123299 Semiconductor integrated circuit and a method of testing the same
06/08/2006US20060122287 Polyol composition of the two-part system for foam grindstone, two-part curable composition for foam grindstone, foam grindstone, and process for production thereof
06/08/2006US20060122085 Compositions and methods for high-efficiency cleaning of semiconductor wafers
06/08/2006US20060121875 Wireless communication system
06/08/2006US20060121837 Dressing method for polishing pad
06/08/2006US20060121835 Polishing method
06/08/2006US20060121747 Ink-jet printhead fabrication
06/08/2006US20060121746 Semiconductor device manufacturing method and semiconductor manufacturing apparatus
06/08/2006US20060121745 Method for manufacturing display device
06/08/2006US20060121744 Top surface roughness reduction of high-k dielectric materials using plasma based processes
06/08/2006US20060121743 Flow control of photo-polymerizable resin
06/08/2006US20060121742 Method for making a semiconductor device having a high-k gate dielectric
06/08/2006US20060121741 Device for supplying a solution onto a substrate and method for supplying the solution onto the substrate by using the same
06/08/2006US20060121740 Semiconductor integrated circuit device and method for fabricating the same
06/08/2006US20060121739 Method for reducing line edge roughness for conductive features
06/08/2006US20060121738 Method of treating conductive layer for use in a circuitized substrate and method of making said substrate having said conductive layer as part thereof
06/08/2006US20060121737 Method of manufacturing a semiconductor device and method of manufacturing a thin layer using the same
06/08/2006US20060121736 Semiconductor device and manufacturing method thereof
06/08/2006US20060121735 Method for producing insulation structures
06/08/2006US20060121734 Semiconductor device
06/08/2006US20060121733 Selective formation of metal layers in an integrated circuit
06/08/2006US20060121732 Circuit package and method of plating the same