Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
06/2006
06/06/2006US7056835 Surface preparation prior to deposition
06/06/2006US7056834 Forming a plurality of thin-film devices using imprint lithography
06/06/2006US7056833 Methods of filling gaps and methods of depositing materials using high density plasma chemical vapor deposition
06/06/2006US7056832 Deep trench self-alignment process for an active area of a partial vertical cell
06/06/2006US7056831 Plasma processing apparatus and plasma processing method
06/06/2006US7056830 Method for plasma etching a dielectric layer
06/06/2006US7056829 Polishing composition for semiconductor wafers
06/06/2006US7056828 Sidewall spacer structure for self-aligned contact and method for forming the same
06/06/2006US7056827 Methods of filling trenches using high-density plasma deposition (HDP)
06/06/2006US7056826 Method of forming copper interconnects
06/06/2006US7056825 Method for manufacturing a semiconductor device that includes plasma treating an insulating film with a mixture of helium and argon gases
06/06/2006US7056824 Electronic device manufacture
06/06/2006US7056823 Backend metallization method and device obtained therefrom
06/06/2006US7056822 Method of fabricating an interconnect structure employing air gaps between metal lines and between metal layers
06/06/2006US7056821 Method for manufacturing dual damascene structure with a trench formed first
06/06/2006US7056820 Bond pad
06/06/2006US7056819 Methods and apparatus for determining pad height for a wire-bonding operation in an integrated circuit
06/06/2006US7056818 Semiconductor device with under bump metallurgy and method for fabricating the same
06/06/2006US7056817 Forming a cap above a metal layer
06/06/2006US7056816 Method for manufacturing semiconductor device
06/06/2006US7056815 Narrow energy band gap gallium arsenide nitride semi-conductors and an ion-cut-synthesis method for producing the same
06/06/2006US7056814 Methods of manufacturing a MOS transistor
06/06/2006US7056813 Methods of forming backside connections on a wafer stack
06/06/2006US7056812 Process for strengthening semiconductor substrates following thinning
06/06/2006US7056811 Method for manufacturing semiconductor device
06/06/2006US7056810 Method for manufacturing semiconductor apparatus, and semiconductor apparatus and electric appliance
06/06/2006US7056809 Method for ion treating a semiconductor material for subsequent bonding
06/06/2006US7056808 Cleaving process to fabricate multilayered substrates using low implantation doses
06/06/2006US7056807 Barrier structure against corrosion and contamination in three-dimensional (3-D) wafer-to-wafer vertical stack
06/06/2006US7056806 Microfeature workpiece processing apparatus and methods for controlling deposition of materials on microfeature workpieces
06/06/2006US7056805 Substrate provided with an alignment mark in a substantially transmissive process layer, mask for exposing said mark, device manufacturing method, and device manufactured thereby
06/06/2006US7056804 Shallow trench isolation polish stop layer for reduced topography
06/06/2006US7056803 Method for forming capacitor of semiconductor device
06/06/2006US7056802 Method for fabricating a trench capacitor with an insulation collar which is electrically connected to a substrate on one side via a buried contact, in particular for a semiconductor memory cell
06/06/2006US7056801 Radio frequency integrated circuit, and method for manufacturing the same
06/06/2006US7056800 Printed circuit embedded capacitors
06/06/2006US7056799 Method of forming wing gate transistor for integrated circuits
06/06/2006US7056798 Semiconductor device, method for manufacturing the same, and liquid jet apparatus
06/06/2006US7056797 Semiconductor device and method of manufacturing the same
06/06/2006US7056796 Method for fabricating silicide by heating an epitaxial layer and a metal layer formed thereon
06/06/2006US7056795 Thin-film transistor used as heating element for microreaction chamber
06/06/2006US7056794 FET gate structure with metal gate electrode and silicide contact
06/06/2006US7056793 Semiconductor device and a method for manufacturing same
06/06/2006US7056792 Stacked gate flash memory device and method of fabricating the same
06/06/2006US7056791 Method of forming an embedded flash memory device
06/06/2006US7056790 DRAM cell having MOS capacitor and method for manufacturing the same
06/06/2006US7056789 Production method for semiconductor substrate and production method for field effect transistor and semiconductor substrate and field effect transistor
06/06/2006US7056788 Method for fabricating a semiconductor device
06/06/2006US7056787 Method of manufacturing semiconductor device
06/06/2006US7056786 Self-aligned buried contact pair and method of forming the same
06/06/2006US7056785 Non-volatile memory cell fabricated with slight modification to a conventional logic process and methods of operating same
06/06/2006US7056784 Methods of forming capacitors by ALD to prevent oxidation of the lower electrode
06/06/2006US7056783 Multiple operating voltage vertical replacement-gate (VRG) transistor
06/06/2006US7056782 CMOS silicide metal gate integration
06/06/2006US7056781 Method of forming fin field effect transistor
06/06/2006US7056780 Etching metal silicides and germanides
06/06/2006US7056779 Semiconductor power device
06/06/2006US7056778 Semiconductor layer formation
06/06/2006US7056777 Thin film transistor array substrate, manufacturing method thereof, and mask
06/06/2006US7056776 Semiconductor devices having metal containing N-type and P-type gate electrodes and methods of forming the same
06/06/2006US7056775 Semiconductor device and process for fabricating the same
06/06/2006US7056774 Method of manufacturing semiconductor device
06/06/2006US7056773 Backgated FinFET having different oxide thicknesses
06/06/2006US7056772 Method for sealing semiconductor component
06/06/2006US7056771 Method of forming an array of semiconductor packages
06/06/2006US7056770 Method of resin encapsulation, apparatus for resin encapsulation, method of manufacturing semiconductor device, semiconductor device and resin material
06/06/2006US7056769 Method of manufacturing an electronic device
06/06/2006US7056768 Cutting method and method of manufacturing semiconductor device
06/06/2006US7056767 Method and apparatus for flip chip device assembly by radiant heating
06/06/2006US7056766 Method of forming land grid array packaged device
06/06/2006US7056765 Semiconductor device package and method of manufacture
06/06/2006US7056764 Electronic sensor device and method for producing the electronic sensor device
06/06/2006US7056763 Composite structure for electronic microsystems and method for production of said composite structure
06/06/2006US7056762 Methods to form a memory cell with metal-rich metal chalcogenide
06/06/2006US7056761 Avalanche diode with breakdown voltage controlled by gate length
06/06/2006US7056760 On chip CMOS optical element
06/06/2006US7056759 Method for making a microelectromechanical system using a flexure protection layer
06/06/2006US7056758 Electromechanical memory array using nanotube ribbons and method for making same
06/06/2006US7056757 Methods of forming oxide masks with submicron openings and microstructures formed thereby
06/06/2006US7056756 Nitride semiconductor laser device and fabricating method thereof
06/06/2006US7056755 P-type nitride semiconductor and method of manufacturing the same
06/06/2006US7056754 Methods for producing waveguides
06/06/2006US7056753 Field emission display with double gate structure and method of manufacturing therefor
06/06/2006US7056752 Fabricating a die with test enable circuits between embedded cores
06/06/2006US7056751 Method and system for increasing yield of vertically integrated devices
06/06/2006US7056750 Ferroelectric film, method of manufacturing ferroelectric film, ferroelectric capacitor, and ferroelectric memory
06/06/2006US7056749 Simplified magnetic memory cell
06/06/2006US7056649 Process for producing a tool insert for injection molding a part with two-stage microstructures
06/06/2006US7056648 Method for isotropic etching of copper
06/06/2006US7056647 Semiconductors
06/06/2006US7056645 Use of chromeless phase shift features to pattern large area line/space geometries
06/06/2006US7056640 Improved resolution, improved focus latitude, and minimized line width variation or shape degradation even on long-term PED.
06/06/2006US7056629 slit or aperture layouts and radiation beams for projection onto regions of films covering substrates to induce crystallization, without the need to rotate the photomasks; effieciency
06/06/2006US7056626 Crystallization apparatus, crystallization method, thin film transistor and display apparatus
06/06/2006US7056623 Depositing a first material on a substrate and applying a thermal treatment to the substrate at >300 degrees Celsius before completing the deposition of the first material; stress relieving; dimensional stability; flatness; semiconductors
06/06/2006US7056560 Reacting organosilicon compound and hydrocarbon; vapor phase; aftertreatment with electron beams
06/06/2006US7056446 Method of manufacturing nano-gap electrode
06/06/2006US7056416 Atmospheric pressure plasma processing method and apparatus
06/06/2006US7056414 Connecting method for metal material and electric conductive plastic material and product thereby
06/06/2006US7056406 Porous adhesive sheet, semiconductor wafer with porous adhesive sheet and method of manufacture thereof