Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
08/2006
08/31/2006WO2006090458A1 Semiconductor device and method for manufacturing same
08/31/2006WO2006090445A1 Semiconductor circuit device, and method for manufacturing the semiconductor circuit device
08/31/2006WO2006090441A1 Semiconductor device and method for manufacturing same
08/31/2006WO2006090432A1 PROCESS FOR PRODUCING SiC SINGLE-CRYSTAL SUBSTRATE
08/31/2006WO2006090430A1 Semiconductor heat treatment method and semiconductor heat treatment apparatus
08/31/2006WO2006090417A1 Method for realising a nanometric circuit architecture between standard electronic components and semiconductor device obtained with said method
08/31/2006WO2006090245A2 Ink jet printable compositions for preparing electronic devices and patterns
08/31/2006WO2006090034A1 Method for making a dismountable substrate
08/31/2006WO2006089959A1 Metal interconnect structure and method
08/31/2006WO2006089860A1 Apparatus for removing or decreasing the resin flush from the metallic part of a semiconductor device.
08/31/2006WO2006089725A2 Charge compensation semiconductor device and relative manufacturing process
08/31/2006WO2006089559A1 A network, a system and a node for use in the network or system
08/31/2006WO2006089435A1 Method for positioning a wafer
08/31/2006WO2006089337A1 Method of bonding substrates
08/31/2006WO2006074902A3 Method for depositing palladium layers and palladium bath therefor
08/31/2006WO2006071475A3 Wafer planarization composition and method of use
08/31/2006WO2006063145A3 A method for manufacturing a silicided gate electrode using a buffer layer
08/31/2006WO2006061792A3 Hermetically sealed integrated circuit package
08/31/2006WO2006060543A3 Use of cl2 and/or hcl during silicon epitaxial film formation
08/31/2006WO2006060124A3 Optimization of beam utilization
08/31/2006WO2006059261A3 A method of forming an interconnect structure on an integrated circuit die
08/31/2006WO2006056648A3 Electronics module and method for manufacturing the same
08/31/2006WO2006053096A3 High selectivity slurry compositions for chemical mechanical polishing
08/31/2006WO2006052433A3 Polishing composition and method for high silicon nitride to silicon oxide removal rate ratios
08/31/2006WO2006052222A3 Multi-functional copolymers comprising rare earth metal complexes and devices thereof
08/31/2006WO2006050690A3 Electronic component and method for the production thereof
08/31/2006WO2006044417B1 Cmp composition with a polymer additive for polishing noble metals
08/31/2006WO2006035425A3 Spray method for producing semiconductor nanoparticles
08/31/2006WO2006028573A3 Deposition of ruthenium and/or ruthenium oxide films
08/31/2006WO2006022597A3 Supply mechanism for the chuck of an integrated circuit dicing device
08/31/2006WO2006020439A3 A system and method for low temperature plasma-enhanced bonding
08/31/2006WO2006004929A3 Electrochemical deposition method utilizing microdroplets of solution
08/31/2006US20060195815 Exposure data generator and method thereof
08/31/2006US20060195812 Designing system and method for designing a system LSI
08/31/2006US20060195729 Reconfigurable processor module comprising hybrid stacked integrated circuit die elements
08/31/2006US20060195216 Substrate processing apparatus and method of transporting substrates and method of processing substrates in substrate processing apparatus
08/31/2006US20060194525 Chemical mechanical polishing system having multiple polishing stations and providing relative linear polishing motion
08/31/2006US20060194523 Method and apparatus for forming and using planarizing pads for mechanical and chemical-mechanical planarization of microelectronic substrates
08/31/2006US20060194522 Method and apparatus for forming and using planarizing pads for mechanical and chemical-mechanical planarization of microelectronic substrates
08/31/2006US20060194521 Polishing apparatus
08/31/2006US20060194520 Chamfered freestanding nitride semiconductor wafer and method of chamfering nitride semiconductor wafer
08/31/2006US20060194518 Methods for planarization of Group VIII metal-containing surfaces using a fixed abrasive article
08/31/2006US20060194514 Jet singulation
08/31/2006US20060194454 Technique to radiation-harden trench refill oxides
08/31/2006US20060194453 Silicon dioxide film and process for preparation of the same
08/31/2006US20060194452 Plasma nitridization for adjusting transistor threshold voltage
08/31/2006US20060194451 High-k dielectric film, method of forming the same and related semiconductor device
08/31/2006US20060194450 Semiconductor device and fabrication process of semiconductor device
08/31/2006US20060194449 Resist pattern forming method and method of manufacturing semiconductor device
08/31/2006US20060194448 Replication tools and related fabrication methods and apparatus
08/31/2006US20060194447 Plasma Treatment of an Etch Stop Layer
08/31/2006US20060194446 Plasma nitridization for adjusting transistor threshold voltage
08/31/2006US20060194445 Semiconductor manufacturing apparatus and method
08/31/2006US20060194444 Patterning method for fabricating high resolution structures
08/31/2006US20060194443 Field effect transistor with gate spacer structure and low-resistance channel coupling
08/31/2006US20060194442 Procede method for cleaning a semiconductor
08/31/2006US20060194441 Method for etching a silicon wafer and method for performing differentiation between the obverse and the reverse of a silicon wafer using the same method
08/31/2006US20060194440 Semiconductor device and method for producing the same
08/31/2006US20060194439 Etch with striation control
08/31/2006US20060194438 Method of forming a nanocluster charge storage device
08/31/2006US20060194437 Use of pulsed grounding source in a plasma reactor
08/31/2006US20060194436 Semiconductor device including resistor and method of fabricating the same
08/31/2006US20060194435 Method of processing substrate, and method of and program for manufacturing electronic device
08/31/2006US20060194434 Small grain size, conformal aluminum interconnects and method for their formation
08/31/2006US20060194433 Anodized aluminum alloy coating on substrate
08/31/2006US20060194432 Methods of fabricating integrated circuit devices having self-aligned contact structures
08/31/2006US20060194431 Technique for metal deposition by electroless plating using an activation scheme including a substrate heating process
08/31/2006US20060194430 Metal interconnect structure and method
08/31/2006US20060194429 Semiconductor device and method of manufacturing the same
08/31/2006US20060194428 Control of wafer warpage during backend processing
08/31/2006US20060194427 Interconnecting process and method for fabricating complex dielectric barrier layer
08/31/2006US20060194426 Method for manufacturing dual damascene structure with a trench formed first
08/31/2006US20060194425 Anisotropic conductive adhesive, electrode connection structure and method using the adhesive
08/31/2006US20060194424 Microfeature devices and methods for manufacturing microfeature devices
08/31/2006US20060194423 Method of making a nitrided gate dielectric
08/31/2006US20060194422 Abrupt "delta-like" doping in Si and SiGe films by UHV-CVD
08/31/2006US20060194421 Structure and method of fabricating a hybrid substrate for high-performance hybrid-orientation silicon-on-insulator CMOS devices
08/31/2006US20060194420 Multilayer film
08/31/2006US20060194419 Crystalline-si-layer-bearing substrate and its production method, and crystalline si device
08/31/2006US20060194418 Smooth surface liquid phase epitaxial germanium
08/31/2006US20060194417 Polycrystalline sillicon substrate
08/31/2006US20060194416 Method for producing single crystal ingot from which semiconductor wafer is sliced
08/31/2006US20060194415 Germanium infrared sensor for CMOS imagers
08/31/2006US20060194414 Low temperature fusion bonding with high surface energy using a wet chemical treatment
08/31/2006US20060194413 Method of bonding substrates
08/31/2006US20060194412 Method and device for sticking tape
08/31/2006US20060194411 Method to fabricate completely isolated silicon regions
08/31/2006US20060194410 Semiconductor device with cavity and method of manufacture thereof
08/31/2006US20060194409 Process for manufacturing a SOI wafer with improved gettering capability
08/31/2006US20060194408 Process and circuit for manufacturing electronic semiconductor devices in a SOI substrate
08/31/2006US20060194407 Application of impressed-current cathodic protection to prevent metal corrosion and oxidation
08/31/2006US20060194406 Semiconductor wafer positioning method, and apparatus using the same
08/31/2006US20060194405 Semiconductor device and method of fabricating the same
08/31/2006US20060194404 Method and system for fabricating and cleaning free-standing nanostructures
08/31/2006US20060194403 PCMO thin film with controlled resistance characteristics
08/31/2006US20060194402 Chip resistor
08/31/2006US20060194401 Method for manufacturing a semiconductor device having an alignment feature formed using an N-type dopant and a wet oxidation process
08/31/2006US20060194400 Method for fabricating a semiconductor device
08/31/2006US20060194399 Silicide Gate Transistors and Method of Manufacture
08/31/2006US20060194398 Semiconductor device and its manufacturing method