Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
09/2006
09/12/2006US7105460 Nitrogen-free dielectric anti-reflective coating and hardmask
09/12/2006US7105459 Method for forming thin film
09/12/2006US7105458 Method of etching semiconductor devices using a hydrogen peroxide-water mixture
09/12/2006US7105457 Semiconductor device manufacturing method and apparatus used in the semiconductor device manufacturing method
09/12/2006US7105456 Methods for controlling feature dimensions in crystalline substrates
09/12/2006US7105455 Method for fabricating nonvolatile memory device
09/12/2006US7105454 Use of ammonia for etching organic low-k dielectrics
09/12/2006US7105453 Method for forming contact holes
09/12/2006US7105452 Method of planarizing a semiconductor substrate with an etching chemistry
09/12/2006US7105451 Method for manufacturing semiconductor device
09/12/2006US7105449 Method for cleaning substrate and method for producing semiconductor device
09/12/2006US7105448 Method for peeling off semiconductor element and method for manufacturing semiconductor device
09/12/2006US7105447 Etching method
09/12/2006US7105445 Interconnect structures with encasing cap and methods of making thereof
09/12/2006US7105444 Method for forming a wiring of a semiconductor device, method for forming a metal layer of a semiconductor device and apparatus for performing the same
09/12/2006US7105443 Method for fabricating epitaxial cobalt-disilicide layers using cobalt-nitride thin film
09/12/2006US7105442 Ashable layers for reducing critical dimensions of integrated circuit features
09/12/2006US7105440 Self-forming metal silicide gate for CMOS devices
09/12/2006US7105439 Cobalt/nickel bi-layer silicide process for very narrow line polysilicon gate technology
09/12/2006US7105438 Manufacturing method of a semiconductor device with a metal gate electrode and a structure thereof
09/12/2006US7105437 Methods for creating electrophoretically insulated vias in semiconductive substrates
09/12/2006US7105436 Method for in-line monitoring of via/contact holes etch process based on test structures in semiconductor wafer manufacturing
09/12/2006US7105435 Methods of forming a contact hole in a semiconductor device
09/12/2006US7105434 Advanced seed layery for metallic interconnects
09/12/2006US7105433 Method for treating wafer surface
09/12/2006US7105432 Method of locating conductive spheres utilizing screen and hopper of solder balls
09/12/2006US7105431 Masking methods
09/12/2006US7105430 Method for forming a semiconductor device having a notched control electrode and structure thereof
09/12/2006US7105429 Method of inhibiting metal silicide encroachment in a transistor
09/12/2006US7105428 Systems and methods for nanowire growth and harvesting
09/12/2006US7105427 Method for shallow dopant distribution
09/12/2006US7105426 Method of forming a semi-insulating region
09/12/2006US7105425 Single electron devices formed by laser thermal annealing
09/12/2006US7105424 Method for preparing arylphosphonite antioxidant
09/12/2006US7105423 Method of manufacturing semiconductor device
09/12/2006US7105422 Thin film circuit device, manufacturing method thereof, electro-optical apparatus, and electronic system
09/12/2006US7105421 Silicon on insulator field effect transistor with heterojunction gate
09/12/2006US7105420 Method to fabricate horizontal air columns underneath metal inductor
09/12/2006US7105419 Thin-film semiconductor substrate, method of manufacturing thin-film semiconductor substrate, method of crystallization, apparatus for crystallization, thin-film semiconductor device, and method of manufacturing thin-film semiconductor device
09/12/2006US7105418 Multiple stacked capacitors formed within an opening with thick capacitor dielectric
09/12/2006US7105417 Method for fabricating capacitor of semiconductor device
09/12/2006US7105416 Method for controlling the top width of a trench
09/12/2006US7105415 Method for the production of a bipolar transistor
09/12/2006US7105414 Method of manufacturing MOS transistor
09/12/2006US7105413 Methods for forming super-steep diffusion region profiles in MOS devices and resulting semiconductor topographies
09/12/2006US7105412 Silicide process utilizing pre-amorphization implant and second spacer
09/12/2006US7105411 Methods of forming a transistor gate
09/12/2006US7105410 Contact process and structure for a semiconductor device
09/12/2006US7105409 Semiconductor integrated circuit device and process for producing the same
09/12/2006US7105408 Phase change memory with a select device having a breakdown layer
09/12/2006US7105407 Method of fabricating semiconductor device
09/12/2006US7105406 Self aligned non-volatile memory cell and process for fabrication
09/12/2006US7105405 Rugged metal electrodes for metal-insulator-metal capacitors
09/12/2006US7105404 Method for fabricating a semiconductor structure
09/12/2006US7105403 Double sided container capacitor for a semiconductor device and method for forming same
09/12/2006US7105402 Semiconductor constructions, and methods of forming semiconductor constructions
09/12/2006US7105401 Capacitor for semiconductor device, manufacturing method thereof, and electronic device employing the same
09/12/2006US7105400 Manufacturing method of semiconductor device
09/12/2006US7105399 Selective epitaxial growth for tunable channel thickness
09/12/2006US7105398 Method for monitoring lateral encroachment of spacer process on a CD SEM
09/12/2006US7105397 Semiconductor device and method of fabricating the same
09/12/2006US7105396 Phase changeable memory cells and methods of fabricating the same
09/12/2006US7105394 Semiconductor device and a method of manufacturing the same
09/12/2006US7105393 Strained silicon layer fabrication with reduced dislocation defect density
09/12/2006US7105392 Semiconductor device and method of manufacturing the same
09/12/2006US7105391 Planar pedestal multi gate device
09/12/2006US7105390 Nonplanar transistors with metal gate electrodes
09/12/2006US7105389 Method of manufacturing semiconductor device having impurity region under isolation region
09/12/2006US7105388 Method of forming at least one interconnection to a source/drain region in silicon-on-insulator integrated circuitry
09/12/2006US7105387 Semiconductor device and manufacturing method for the same
09/12/2006US7105386 High density SRAM cell with latched vertical transistors
09/12/2006US7105385 FPGA blocks with adjustable porosity pass thru
09/12/2006US7105384 Circuit device manufacturing method including mounting circuit elements on a conductive foil, forming separation grooves in the foil, and etching the rear of the foil
09/12/2006US7105383 Packaged semiconductor with coated leads and method therefore
09/12/2006US7105382 Self-aligned electrodes contained within the trenches of an electroosmotic pump
09/12/2006US7105381 Wafer alignment method
09/12/2006US7105380 Method of temporarily securing a die to a burn-in carrier
09/12/2006US7105379 Implementation of protection layer for bond pad protection
09/12/2006US7105378 Method of forming a leadframe for a semiconductor package
09/12/2006US7105377 Method and system for universal packaging in conjunction with a back-end integrated circuit manufacturing process
09/12/2006US7105376 Self-location method and apparatus
09/12/2006US7105375 Reverse printing
09/12/2006US7105374 Memory cell containing copolymer containing diarylacetylene portion
09/12/2006US7105373 Vertical photodiode with heavily-doped regions of alternating conductivity types
09/12/2006US7105372 Magnetic tunneling junction film structure with process determined in-plane magnetic anisotropy
09/12/2006US7105370 Method for fabricating a radiation-emitting semiconductor chip based on III-V nitride semiconductor
09/12/2006US7105369 Methods of fabricating planar PIN and APD photodiodes
09/12/2006US7105368 Method of fabricating and evaluating liquid-crystal display
09/12/2006US7105367 Method of manufacturing array substrate for liquid crystal display device
09/12/2006US7105365 Method of manufacturing a semiconductor device
09/12/2006US7105364 Method of increasing reliability of packaged semiconductor integrated circuit dice
09/12/2006US7105363 Cladded conductor for use in a magnetoelectronics device and method for fabricating the same
09/12/2006US7105362 Method of forming dielectric film
09/12/2006US7105361 Method of etching a magnetic material
09/12/2006US7105360 Low temperature melt-processing of organic-inorganic hybrid
09/12/2006US7105281 Forming a resin mold, interposing a photosensitive polymer forming layers, exposing the layered structure with an electron beam, ultraviolet radiation or visible radiaton, removing an exposed photosensitive polymer, and filling the vacant portion with a metal
09/12/2006US7105275 Positive resist composition and method of forming pattern using the same
09/12/2006US7105273 Positive resist composition
09/12/2006US7105271 For forming fine patterns having a high aspect ratio
09/12/2006US7105269 For use as chemically-amplified resist useful for microfabrication utilizing integrated circuit devices; photolithography