Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
09/2006
09/05/2006US7102182 Semiconductor device
09/05/2006US7102179 Power semiconductor device used for power control
09/05/2006US7102177 Light-emitting diode incorporating gradient index element
09/05/2006US7102173 Nitride semiconductor device and method of manufacturing the same
09/05/2006US7102171 Magnetic semiconductor material and method for preparation thereof
09/05/2006US7102170 Display device
09/05/2006US7102169 Semiconductor device
09/05/2006US7102168 Thin film transistor array panel for display and manufacturing method thereof
09/05/2006US7102165 Semiconductor device and manufacturing method thereof
09/05/2006US7102164 Semiconductor device having a conductive layer with a light shielding part
09/05/2006US7102163 Contact between element to be driven and thin film transistor for supplying power to element to be driven
09/05/2006US7102159 Ultra thin image sensor package structure and method for fabrication
09/05/2006US7102155 Electrode substrate, thin film transistor, display device and their production
09/05/2006US7102153 Strained silicon forming method with reduction of threading dislocation density
09/05/2006US7102150 PCRAM memory cell and method of making same
09/05/2006US7102147 Charged particle beam exposure method and method for producing charged particle beam exposure data
09/05/2006US7102124 Multi-axial positioning mechanism for a FIMS system port door
09/05/2006US7102104 Thermal processing unit; a tubular processing container for holding semiconductor wafers in a tier-like manner for film-forming process, an etching process, an oxidation process producting semiconductor integrated circuits
09/05/2006US7102085 Wiring substrate
09/05/2006US7101948 Vapor deposition of silica; using free radical scavenger
09/05/2006US7101817 System and method for determining line widths of free-standing structures resulting from a semiconductor manufacturing process
09/05/2006US7101816 Methods for adaptive real time control of a thermal processing system
09/05/2006US7101815 Method for improving thickness uniformity of deposited ozone-TEOS silicate glass layers
09/05/2006US7101814 Masking without photolithography during the formation of a semiconductor device
09/05/2006US7101813 Atomic layer deposited Zr-Sn-Ti-O films
09/05/2006US7101812 Method of forming and/or modifying a dielectric film on a semiconductor surface
09/05/2006US7101811 Method for forming a dielectric layer and related devices
09/05/2006US7101810 Transparent article having protective silicon nitride film
09/05/2006US7101809 Method of manufacturing a substrate for an electronic device by using etchant and electronic device having the substrate
09/05/2006US7101808 Chromate-free method for surface etching of stainless steel
09/05/2006US7101807 Method of fabricating semiconductor device
09/05/2006US7101806 Deep trench formation in semiconductor device fabrication
09/05/2006US7101805 Envelope follower end point detection in time division multiplexed processes
09/05/2006US7101804 Method for forming fuse integrated with dual damascene process
09/05/2006US7101803 Method of trench isolation and method for manufacturing a non-volatile memory device using the same
09/05/2006US7101802 Method for forming bottle-shaped trench
09/05/2006US7101801 Method of manufacturing semiconductor device using chemical mechanical polishing
09/05/2006US7101800 Chemical-mechanical polishing slurry and method
09/05/2006US7101799 Feedforward and feedback control for conditioning of chemical mechanical polishing pad
09/05/2006US7101798 Method to modulate etch rate in SLAM
09/05/2006US7101797 Substrate processing device and processing method
09/05/2006US7101796 Method for forming a plane structure
09/05/2006US7101795 Method and apparatus for depositing refractory metal layers employing sequential deposition techniques to form a nucleation layer
09/05/2006US7101794 Coated semiconductor wafer, and process and device for producing the semiconductor wafer
09/05/2006US7101793 Power module and its manufacturing method
09/05/2006US7101792 Methods of plating via interconnects
09/05/2006US7101791 Method for forming conductive line of semiconductor device
09/05/2006US7101790 Method of forming a robust copper interconnect by dilute metal doping
09/05/2006US7101789 Method of wet etching vias and articles formed thereby
09/05/2006US7101788 Semiconductor devices and methods of manufacturing such semiconductor devices
09/05/2006US7101787 System and method for minimizing increases in via resistance by applying a nitrogen plasma after a titanium liner deposition
09/05/2006US7101786 Method for forming a metal line in a semiconductor device
09/05/2006US7101785 Formation of a contact in a device, and the device including the contact
09/05/2006US7101784 Method to generate porous organic dielectric
09/05/2006US7101783 Method for forming bit-line of semiconductor device
09/05/2006US7101782 Method of making a circuitized substrate
09/05/2006US7101781 Integrated circuit packages without solder mask and method for the same
09/05/2006US7101780 Method for manufacturing Group-III nitride compound semiconductor device
09/05/2006US7101779 Method of forming barrier layers
09/05/2006US7101778 Transmission lines for CMOS integrated circuits
09/05/2006US7101777 Methods for manufacturing stacked gate structure and field effect transistor provided with the same
09/05/2006US7101776 Method of fabricating MOS transistor using total gate silicidation process
09/05/2006US7101775 Semiconductor device and method for manufacturing semiconductor device
09/05/2006US7101774 Method of manufacturing compound single crystal
09/05/2006US7101773 Method of producing a contact system on the rear of a component with stacked substrates
09/05/2006US7101772 Means for forming SOI
09/05/2006US7101771 Spin coating for maximum fill characteristic yielding a planarized thin film surface
09/05/2006US7101770 Capacitive techniques to reduce noise in high speed interconnections
09/05/2006US7101769 Method of forming a reliable high performance capacitor using an isotropic etching process
09/05/2006US7101768 Self-aligned selective hemispherical grain deposition process and structure for enhanced capacitance trench capacitor
09/05/2006US7101767 Methods of forming capacitors
09/05/2006US7101766 Methods of fabricating semiconductor device having T-shaped gate and L-shaped spacer
09/05/2006US7101765 Enhancing strained device performance by use of multi narrow section layout
09/05/2006US7101764 High-voltage transistor and fabrication process
09/05/2006US7101763 Low capacitance junction-isolation for bulk FinFET technology
09/05/2006US7101762 Self-aligned double gate mosfet with separate gates
09/05/2006US7101761 Method of fabricating semiconductor devices with replacement, coaxial gate structure
09/05/2006US7101760 Charge trapping nanocrystal dielectric for non-volatile memory transistor
09/05/2006US7101759 Methods for fabricating nonvolatile memory devices
09/05/2006US7101758 Poly-etching method for split gate flash memory cell
09/05/2006US7101757 Nonvolatile memory cells with buried channel transistors
09/05/2006US7101756 Methods for enhancing capacitors having roughened features to increase charge-storage capacity
09/05/2006US7101755 Gate conductor isolation and method for manufacturing same
09/05/2006US7101754 Titanium silicate films with high dielectric constant
09/05/2006US7101753 Method for manufacturing a semiconductor device and method for forming high-dielectric-constant film
09/05/2006US7101752 Semiconductor process for removing defects due to edge chips of a semiconductor wafer and semiconductor device fabricated thereby
09/05/2006US7101751 Versatile system for limiting electric field degradation of semiconductor structures
09/05/2006US7101750 Semiconductor device for integrated injection logic cell and process for fabricating the same
09/05/2006US7101749 Non-volatile semiconductor memory device
09/05/2006US7101748 Method of integrating the formation of a shallow junction N channel device with the formation of P channel, ESD and input/output devices
09/05/2006US7101747 Dual work function metal gates and methods of forming
09/05/2006US7101746 Method to lower work function of gate electrode through Ge implantation
09/05/2006US7101745 Method of forming ladder-type gate structure for four-terminal SOI semiconductor device
09/05/2006US7101744 Method for forming self-aligned, dual silicon nitride liner for CMOS devices
09/05/2006US7101743 Low cost source drain elevation through poly amorphizing implant technology
09/05/2006US7101742 Strained channel complementary field-effect transistors and methods of manufacture
09/05/2006US7101741 Dual double gate transistor and method for forming
09/05/2006US7101740 Electronic devices comprising bottom-gate TFTs and their manufacture
09/05/2006US7101739 Method for forming a schottky diode on a silicon carbide substrate
09/05/2006US7101738 Gate dielectric antifuse circuit to protect a high-voltage transistor