Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
10/2006
10/10/2006US7118954 High voltage metal-oxide-semiconductor transistor devices and method of making the same
10/10/2006US7118953 Process of fabricating termination region for trench MIS device
10/10/2006US7118952 Method of making transistor with strained source/drain
10/10/2006US7118951 Method of isolating the current sense on power devices while maintaining a continuous stripe cell
10/10/2006US7118950 Method of forming a field effect transistor
10/10/2006US7118949 Semiconductor integrated circuit device and method for manufacturing the same
10/10/2006US7118948 Semiconductor wafer having different impurity concentrations in respective regions
10/10/2006US7118947 Thin film transistor substrate of a horizontal electric field type LCD and fabricating method thereof
10/10/2006US7118946 Thin film transistor, circuit device and liquid crystal display
10/10/2006US7118945 Method of forming insulating layer and method of fabricating thin film transistor using the same
10/10/2006US7118944 Method for fabricating polycrystalline silicon thin film transistor
10/10/2006US7118943 Production method of a thin film device, production method of a transistor, electro-optical apparatus and electronic equipment
10/10/2006US7118942 Method of making atomic integrated circuit device
10/10/2006US7118941 Forming carbon nanotubes on a substrate; depositing a layer of a metal over the nanotubes and exposed portions of the surface to form a metal matrix around thenanotubes; and separating the matrix and nanotubes from the substrate to form a free-standing device; for packaged integrated circuits
10/10/2006US7118940 Method of fabricating an electronic package having underfill standoff
10/10/2006US7118939 Manufacturing method and manufacturing apparatus for semiconductor device
10/10/2006US7118938 Method for packaging a multi-chip module of a semiconductor device
10/10/2006US7118937 Fabrication method of thin-film transistor array with self-organized organic semiconductor
10/10/2006US7118936 Organic dye-sensitized metal oxide semiconductor electrode and its manufacturing method, and organic dye-sensitized solar cell
10/10/2006US7118934 Porous substrate for epitaxial growth, method for manufacturing same, and method for manufacturing III-nitride semiconductor substrate
10/10/2006US7118933 Method for manufacturing optical bench, optical bench, optical module, silicon wafer substrate in which wiring and groove are formed, and wafer
10/10/2006US7118932 Method of manufacturing waveguide type optical element and integrated optical waveguide type element using waveguide type optical element
10/10/2006US7118931 Radiation emitter device having an integral micro-groove lens
10/10/2006US7118930 Method for manufacturing a light emitting device
10/10/2006US7118929 Process for producing an epitaxial layer of gallium nitride
10/10/2006US7118928 Method of forming a semiconductor phosphor layer by metalorganic chemical vapor deposition for use in light-emitting devices
10/10/2006US7118927 Cold cathode field emission device and process for the production thereof, and cold cathode field emission display and process for the production thereof
10/10/2006US7118926 Method of optimizing seasoning recipe for etch process
10/10/2006US7118925 Fabrication of a ferromagnetic inductor core and capacitor electrode in a single photo mask step
10/10/2006US7118847 Polymer and photoresist compositions
10/10/2006US7118846 Positive resist composition and method of forming a resist pattern using the same
10/10/2006US7118835 Having inverted patterns of transmission regions positioned on a circumference of each of intended patterns of a resist film; for forming a pattern for capacitors of dynamic random access memories needed to be increased in capacity but in a limited occupied area
10/10/2006US7118834 Exposure method, exposure quantity calculating system using the exposure method and semiconductor device manufacturing method using the exposure method
10/10/2006US7118780 Heat treatment method
10/10/2006US7118778 on a SiO2 layer of a wafer in an closed container to ensure the photoresist adheres to the layer tightly without instability and subsequent flaking off or resist lifting due to the insufficient binding force.
10/10/2006US7118686 Slurry for use in polishing semiconductor device conductive structures that include copper and tungsten and polishing methods
10/10/2006US7118685 for polishing a surface comprising an insulating layer and a metal layer; comprising a compound having six or more carbon atoms and a structure in which each of two or more adjacent carbon atoms has a hydroxyl group in a molecule, and water
10/10/2006US7118683 Methods of etching silicon-oxide-containing compositions
10/10/2006US7118679 Method of fabricating a sharp protrusion
10/10/2006US7118663 Anodic oxidizer, anodic oxidation method
10/10/2006US7118657 Pulsed ion beam control of solid state features
10/10/2006US7118646 potting material is used to mechanically secure the circuit board to the housing and to provide an environmental seal at the open end of the housing
10/10/2006US7118645 Method and apparatus for joining protective tape to semiconductor wafer
10/10/2006US7118625 Liquid phase growth method for silicon crystal, manufacturing method for solar cell and liquid phase growth apparatus for silicon crystal
10/10/2006US7118457 Method of forming a polishing pad for endpoint detection
10/10/2006US7118456 Polishing head, retaining ring for use therewith and method fo polishing a substrate
10/10/2006US7118451 CMP apparatus and process sequence method
10/10/2006US7118450 Polishing pad with window and method of fabricating a window in a polishing pad
10/10/2006US7118294 Optical semiconductor module and its manufacturing method
10/10/2006US7117913 Mounting device and method thereof
10/10/2006US7117876 Method of cleaning a side of a thin flat substrate by applying sonic energy to the opposite side of the substrate
10/10/2006US7117790 Microcontact printing
10/10/2006US7117587 Method for fabricating a substrate, including a plurality of chip package substrates
10/10/2006US7117581 Method for high volume assembly of radio frequency identification tags
10/10/2006CA2259910C Removal of material by radiation applied at an oblique angle
10/05/2006WO2006105494A1 Method of fabricating silicon nitride regions in silicon carbide and resulting structure
10/05/2006WO2006105393A1 Laser bonding tool with a guide channel between body portion and laser aperture for improving bonding accuracy
10/05/2006WO2006105320A1 Heat treatment for forming interconnect structures with reduced electro and stress migration and/or resistivity
10/05/2006WO2006105195A2 Transfer chamber between workstations
10/05/2006WO2006105156A2 High speed substrate aligner apparatus
10/05/2006WO2006105150A2 Metal cmp process on one or more polishing stations using slurries with oxidizers
10/05/2006WO2006105136A1 Semiconductor device having a lateral channel
10/05/2006WO2006105077A2 Low voltage thin film transistor with high-k dielectric material
10/05/2006WO2006105015A2 Flip chip interconnection having narrow interconnection sites on the substrate
10/05/2006WO2006104980A2 Laser facet passivation
10/05/2006WO2006104926A2 Asymmetric bidirectional transient voltage suppressor and method of forming same
10/05/2006WO2006104893A2 N+ polysilicon on high-k dielectric semiconductor devices
10/05/2006WO2006104877A2 Method for reducing dielectric overetch using a dielectric etch stop at a planar surface
10/05/2006WO2006104853A1 Low-temperature chemical vapor deposition of low-resistivity ruthenium layers
10/05/2006WO2006104819A2 A method and system for removing an oxide from a substrate
10/05/2006WO2006104817A2 Method for reducing dielectric overetch when making contact to conductive features
10/05/2006WO2006104741A1 A plasma enhanced atomic layer deposition system having reduced contamination
10/05/2006WO2006104687A1 Load bearing insulator in vacuum etch chamber
10/05/2006WO2006104670A2 Treatment of a dielectric layer using supercritical co2
10/05/2006WO2006104655A2 Etch with photoresist mask
10/05/2006WO2006104654A1 Methods of forming recessed access devices
10/05/2006WO2006104634A2 Integrated circuit fabrication
10/05/2006WO2006104585A2 Conducting metal oxide with additive as p-mos device electrode
10/05/2006WO2006104583A2 Method and system for increasing tensile stress in a thin film using multi-frequency electromagnetic radiation
10/05/2006WO2006104582A2 Method and system for increasing tensile stress in a thin film using collimated electromagnetic radiation
10/05/2006WO2006104578A2 Manufacturing ccds in a conventional cmos process
10/05/2006WO2006104563A1 Conductive trace formation via wicking action
10/05/2006WO2006104562A2 Method of forming a semiconductor device having asymmetric dielectric regions and structure thereof
10/05/2006WO2006104549A1 Dual metal gate electrode semiconductor fabrication process and structure thereof
10/05/2006WO2006104547A2 Composition for oxide cmp in cmos device fabrication
10/05/2006WO2006104529A2 Cmos transistor junction regions formed by a cvd etching and deposition sequence
10/05/2006WO2006104276A1 Image drawing apparatus and method
10/05/2006WO2006104264A1 Semiconductor device and method for manufacturing same
10/05/2006WO2006104244A1 Mask pattern designing method using optical proximity correction in optical lithography, designing device, and semiconductor device manufacturing method using the same
10/05/2006WO2006104219A1 Laser irradiation apparatus and method for manufacturing semiconductor device
10/05/2006WO2006104178A1 Quartz-type glass and process for its production
10/05/2006WO2006104169A1 Method of packaging solar cell elements and package body of solar cell elements
10/05/2006WO2006104151A1 Adhesive tape for wafer dicing and chip manufacturing method using same
10/05/2006WO2006104150A1 Semiconductor device producing method and semiconductor device
10/05/2006WO2006104145A1 Plasma doping method and device used for this
10/05/2006WO2006104139A1 Multi-column electron beam exposure device
10/05/2006WO2006104127A1 Exposure apparatus, method for manufacturing exposure apparatus, and method for manufacturing microdevice
10/05/2006WO2006104121A1 Semiconductor production apparatus
10/05/2006WO2006104115A1 Automatic convey system
10/05/2006WO2006104110A1 Method and device for inspecting surface of distorted silicon wafer