Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
10/2006
10/12/2006WO2006106572A1 Semiconductor device
10/12/2006WO2006106570A1 Semiconductor device
10/12/2006WO2006106491A2 Metal-mediated reversible self-assembly of carbon nanotubes
10/12/2006WO2006106170A1 Semiconductor saturable absorber reflector and method to fabricate thereof
10/12/2006WO2006106045A1 Method for removing particles from a semiconductor surface
10/12/2006WO2006105735A1 Package structure with flat bumps for integrate circuit or discrete device and method of manufacture the same
10/12/2006WO2006105734A1 A packaging substrate with flat bumps for electronic devices and method of manufacturing the same
10/12/2006WO2006105733A1 Package structure with flat bumps for electronic device and method of manufacture the same
10/12/2006WO2006081056A3 Method and apparatus for forming a low profile wire loop
10/12/2006WO2006078815A3 Single mask mim capacitor and resistor with in trench copper drift barrier
10/12/2006WO2006069341A3 Cluster tool architecture for processing a substrate
10/12/2006WO2006062766A3 Efficient micro-machining apparatus and method employing multiple laser beams
10/12/2006WO2006060396A3 Packaging for high power integrated circuits using supercritical fluid
10/12/2006WO2006050283A3 Resonant tunneling device using metal oxide semiconductor processing
10/12/2006WO2006031247A3 Method of creating defect free high ge content (25%) sige-on-insulator (sgoi) substrates using wafer bonding techniques
10/12/2006WO2006026350A3 Low temperature silicon compound deposition
10/12/2006WO2006020158A3 Planarizing a semiconductor structure to form replacement metal gates
10/12/2006WO2006015246A3 Method and system for fabricating a strained semiconductor layer
10/12/2006WO2006007343A3 Semiconductor devices shared element(s) apparatus and method
10/12/2006WO2005119784A3 Method for enhancing field oxide and integrated circuit with enhanced field oxide
10/12/2006WO2005117102A3 Low-voltage single-layer polysilicon eeprom memory cell
10/12/2006WO2005117085A3 Gap-type conductive interconnect structures in semiconductor device
10/12/2006WO2005076365A9 Nitride-based transistors with a protective layer and a low-damage recess and methods of fabrication thereof
10/12/2006WO2005065140A3 Method of manufacturing a superjunction device with conventional terminations
10/12/2006US20060229008 Chemical mechanical polishing pads
10/12/2006US20060229000 Polishing pad
10/12/2006US20060228991 Polishing method and apparatus
10/12/2006US20060228908 Method of manufacturing polysilicon thin film and method of manufacturing thin film transistor having the same
10/12/2006US20060228907 Method of forming a gate dielectric layer
10/12/2006US20060228906 Method of patterning conductive polymer layer, organic light emitting device, and method of manufacturing the organic light emitting device
10/12/2006US20060228905 Method for conditioning a microelectronics device deposition chamber
10/12/2006US20060228904 Protection of silicon from phosphoric acid using thick chemical oxide
10/12/2006US20060228903 Precursors for the deposition of carbon-doped silicon nitride or silicon oxynitride films
10/12/2006US20060228902 Method and system for forming an oxynitride layer
10/12/2006US20060228901 Growth method for nitride semiconductor epitaxial layers
10/12/2006US20060228900 Method and system for removing an oxide from a substrate
10/12/2006US20060228899 Semiconductor memory device and method for manufacturing semiconductor device
10/12/2006US20060228898 Method and system for forming a high-k dielectric layer
10/12/2006US20060228897 Rapid thermal processing using energy transfer layers
10/12/2006US20060228896 Fabricating integrated devices using embedded masks
10/12/2006US20060228895 Method of forming fine pitch photoresist patterns using double patterning technique
10/12/2006US20060228894 Method for semiconductor manufacturing using a negative photoresist with thermal flow properties
10/12/2006US20060228893 Semiconductor substrates and field effect transistor constructions
10/12/2006US20060228892 Anti-reflective surface
10/12/2006US20060228891 Method of exposing a substrate to a surface microwave plasma, etching method, deposition method, surface microwave plasma generating apparatus, semiconductor substrate etching apparatus, semiconductor substrate deposition apparatus, and microwave plasma generating antenna assembly
10/12/2006US20060228890 Cleaning solution and method of forming a metal pattern for a semiconductor device using the same
10/12/2006US20060228889 Methods of removing resist from substrates in resist stripping chambers
10/12/2006US20060228888 Atomic layer deposition of high k metal silicates
10/12/2006US20060228887 System and method for depositing a seed layer
10/12/2006US20060228886 Deposition-selective etch-deposition process for dielectric film gapfill
10/12/2006US20060228885 Method of manufacturing semiconductor device
10/12/2006US20060228884 Unidirectionally conductive materials for interconnection
10/12/2006US20060228883 Phase change memory cell defined by a pattern shrink material process
10/12/2006US20060228882 Method for fabricating semiconductor device
10/12/2006US20060228881 Structure and method for minimizing substrate effect on nucleation during sputtering of thin film resistors
10/12/2006US20060228880 Semiconductor structures, and methods of forming semiconductor constructions
10/12/2006US20060228879 Thin film resistor head structure and method for reducing head resistivity variance
10/12/2006US20060228878 Semiconductor package repair method
10/12/2006US20060228877 Patterned material layer, method of forming the same, microdevice, and method of manufacturing the same
10/12/2006US20060228875 Transistor with shallow germanium implantation region in channel
10/12/2006US20060228874 Method of inhibiting copper corrosion during supercritical CO2 cleaning
10/12/2006US20060228872 Method of making a semiconductor device having an arched structure strained semiconductor layer
10/12/2006US20060228871 Method and system for forming an oxynitride layer by performing oxidation and nitridation concurrently
10/12/2006US20060228870 Method of making group III-V nitride-based semiconductor crystal
10/12/2006US20060228869 MEMS packaging structure and methods
10/12/2006US20060228868 ALD of amorphous lanthanide doped TiOx films
10/12/2006US20060228867 Isolation region formation that controllably induces stress in active regions
10/12/2006US20060228866 Methods of filling openings with oxide, and methods of forming trenched isolation regions
10/12/2006US20060228865 System and method for photolithography in semiconductor manufacturing
10/12/2006US20060228864 Semiconductor devices having a bottle-shaped deep trench capacitor and methods for making the same using Epi-Si growth process
10/12/2006US20060228863 Method for making a semiconductor device with strain enhancement
10/12/2006US20060228862 Fet design with long gate and dense pitch
10/12/2006US20060228861 Partially recessed DRAM cell structure and method of making the same
10/12/2006US20060228860 Semiconductor device and a method of manufacturing the same
10/12/2006US20060228859 Contact scheme for memory array and manufacturing methods thereof
10/12/2006US20060228858 Flash memory cell having reduced floating gate to floating gate coupling
10/12/2006US20060228857 DRAM cells
10/12/2006US20060228856 Method of fabricating semiconductor device
10/12/2006US20060228855 Capacitor with co-planar electrodes
10/12/2006US20060228854 Methods for increasing photo alignment margins
10/12/2006US20060228853 Memory devices including spacers on sidewalls of memory storage elements and related methods
10/12/2006US20060228852 Method of forming contact plugs
10/12/2006US20060228851 Method of making a dual strained channel semiconductor device
10/12/2006US20060228850 Pattern loading effect reduction for selective epitaxial growth
10/12/2006US20060228849 Method of forming source/drain region of semiconductor device
10/12/2006US20060228848 Dual-hybrid liner formation without exposing silicide layer to photoresist stripping chemicals
10/12/2006US20060228847 Method of manufacturing mos transistors
10/12/2006US20060228846 Process for Producing SOI Substrate and Process for Regeneration of Layer Transferred Wafer in the Production
10/12/2006US20060228845 Method for pre-retaining CB opening
10/12/2006US20060228844 Integration scheme for fully silicided gate
10/12/2006US20060228843 Method of fabricating semiconductor devices and method of adjusting lattice distance in device channel
10/12/2006US20060228842 Transistor fabrication using double etch/refill process
10/12/2006US20060228841 Methods of forming a thin-film structure, methods of manufacturing non-volatile semiconductor devices using the same, and resulting non-volatile semiconductor devices
10/12/2006US20060228840 Tri-gate devices and methods of fabrication
10/12/2006US20060228839 Methods for fabricating array substrates
10/12/2006US20060228838 Display device and manufacturing method thereof
10/12/2006US20060228837 Apparatus and method for laser radiation
10/12/2006US20060228836 Method and structure for forming strained devices
10/12/2006US20060228835 Method of doping a gate electrode of a field effect transistor
10/12/2006US20060228834 Fabrication method of image scan module
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