Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
10/2006
10/19/2006DE102006013728A1 Verfahren zum Herstellen einer Polierslurry mit hoher Dispersionsstabilität A method of manufacturing a polishing slurry with high dispersion stability
10/19/2006DE102006002940A1 Selektives Ätzen zum Vergrößern des Oberflächenbereichs eines Grabens Selective etching to enlarge the surface area of ​​a trench
10/19/2006DE102005026944A1 Kontaktschema für Speicheranordnung und Herstellungsverfahren hierfür Contact scheme for memory device and manufacturing method thereof
10/19/2006DE102005020061A1 Conductive structure e.g. metal line, forming method, involves performing heat treatment of locally restricted zone, and scanning locally heated zone to reduce number of grain boundaries in length direction of metal line
10/19/2006DE102005017739A1 Halter aus Quarzglas für die Prozessierung von Halbleiterwafern und Verfahren zur Herstellung des Halters Holder made of quartz glass for the processing of semiconductor wafers and methods of making the holder
10/19/2006DE102005017632A1 Method of controlling local etching or deposition in modification of surfaces with pulsed determination of a removal or deposition profile ion streams useful in the high accuracy forming of optical component surfaces involving
10/19/2006DE102005017372A1 Wässrige Ceroxiddispersion Aqueous Ceroxiddispersion
10/19/2006DE102005017164A1 Disk shaped objects handling device, has internal separating plate between transfer unit and system unit and external separating plate that is provided such that transfer unit and system unit are positioned in two subspaces
10/19/2006DE102005016511A1 Verfahren zum Herstellen einer Leiterstruktur auf einem Substrat A method for producing a conductor pattern on a substrate
10/19/2006DE102005016406A1 Transporteinrichtung, insbesondere zum Transport flächiger Substrate durch eine Beschichtungsanlage Transport device, especially for transporting flat substrates through a coating installation
10/19/2006DE102005015826A1 Contact areas and/or contact pads optical inspecting method for use in e.g. integrated computing circuit, involves analyzing output image to detect contrasts and/or impressions that leave contact unit on contact pads during contacting
10/19/2006DE102004060346B4 Herstellungsverfahren für eine Halbleiterstruktur Manufacturing method of a semiconductor structure
10/19/2006DE102004058413B4 Verfahren zur Herstellung einer Chipgroßen Packungsstruktur A method for producing a chip-sized package structure
10/19/2006DE102004029200B4 Verfahren zur Herstellung einer elektronischen Schaltung sowie ein Substrat für eine elektronische Schaltung A process for producing an electronic circuit and a substrate for an electronic circuit
10/19/2006DE102004010352B4 Reduktion von Schub- bzw. Scherspannungen in Kupfer-Vias in organischem dielektrischen Zwischenschichtmaterial Reduction of shear and shear stresses in copper vias in organic interlayer dielectric material
10/19/2006DE102004003315B4 Halbleitervorrichtung mit elektrischem Kontakt und Verfahren zur Herstellung derselben A semiconductor device having electrical contact and methods for making the same
10/19/2006DE102004002659B4 Halbleitervorrichtung mit einem Kontaktmuster und Herstellungsverfahren dafür A semiconductor device with a contact pattern and manufacturing method thereof
10/19/2006DE10147011B4 Chemisch verstärkte Resistzusammensetzung und Verfahren zur Bildung eines gemusterten Films unter Verwendung derselben A chemically amplified resist composition and method for forming a patterned film using the same
10/19/2006DE10122364B4 Kompensationsbauelement, Schaltungsanordnung und Verfahren Compensation device, circuit and method
10/19/2006DE10109172B4 Strombegrenzungseinrichtung Current-limiting device
10/19/2006DE10084994B4 Verfahren zur Bildung einer leitenden Silicidschicht auf einem Silicium enthaltenden Substrat und Verfahren zur Bildung eines leitenden Silicidkontaktes A method of forming a conductive silicide layer on a silicon containing substrate and method for forming a conductive Silicidkontaktes
10/19/2006DE10052419B4 Verfahren zur Herstellung mikromechanischer Bauelemente A process for preparing micromechanical components
10/19/2006CA2649200A1 Method of preparing zinc oxide nanorods on a substrate by chemical spray pyrolysis
10/19/2006CA2603990A1 Selective wet etching of metal nitrides
10/19/2006CA2603851A1 Multi-layer structure having a predetermined layer pattern including an agent
10/19/2006CA2602808A1 Process for the formation of miniaturized getter deposits and getter deposits so obtained
10/19/2006CA2602586A1 Ink composition and metallic material
10/18/2006EP1713314A1 Multilayer printed wiring board
10/18/2006EP1713313A1 Multilayer printed wiring board
10/18/2006EP1713135A1 Method for fabricating piezoelectric element
10/18/2006EP1713125A1 On chip inductive structure
10/18/2006EP1713122A2 Semiconductor device and method for producing the same
10/18/2006EP1713121A2 Silicon on insulator structure from low defect density single crystal silicon
10/18/2006EP1713120A2 Method and apparatus for fabricating high fin-density heatsinks
10/18/2006EP1713119A2 Method for patterning a wafer for the manufacture of an integrated circuit
10/18/2006EP1713118A1 Method for manufacturing semiconductor wafer and system for determining cut position of semiconductor ingot
10/18/2006EP1713117A1 Silicon carbide semiconductor device and process for producing the same
10/18/2006EP1713116A1 PROCESS FOR PRODUCING n-TYPE SEMICONDUCTOR DIAMOND AND n-TYPE SEMICONDUCTOR DIAMOND
10/18/2006EP1713115A1 Exposure apparatus, exposure method, and device producing method
10/18/2006EP1713114A1 Exposure apparatus and method of producing device
10/18/2006EP1713113A1 Stage drive method and stage drive apparatus, exposure apparatus, and device producing method
10/18/2006EP1713054A2 Electroluminescent display device and driving method thereof
10/18/2006EP1713020A1 Method of for manufacturing electronic device
10/18/2006EP1712923A2 Apparatus and method for balancing and for providing a compliant range to a test head
10/18/2006EP1712898A1 Method to inspect a wafer
10/18/2006EP1712113A2 Method for disposing a conductor structure on a substrate, and substrate comprising said conductor structure
10/18/2006EP1712108A1 Cylindrical microwave chamber
10/18/2006EP1711970A1 Ambipolar, light-emitting field-effect transistors
10/18/2006EP1711966A2 Vertical fin-fet mos devices
10/18/2006EP1711965A1 Transistor manufacture
10/18/2006EP1711964A1 Semiconductor structure
10/18/2006EP1711962A2 Limited thermal budget formation of pre-metal dielectric layers
10/18/2006EP1711961A2 Method and apparatus for maintaining parallelism of layers and/or achieving desired thicknesses of layers during the electrochemical fabrication of structures
10/18/2006EP1711960A1 Method of fabricating a mono-crystalline emitter
10/18/2006EP1711959A1 Transistor with doped gate dielectric
10/18/2006EP1711958A1 Method for producing a semiconductor product
10/18/2006EP1711907A1 Method of automatically generating the structures from mask layout
10/18/2006EP1711801A1 Surface inspection using a non-vibrating contact potential probe
10/18/2006EP1711550A1 Adamantyl monomers and polymers for low-k-dielectric applications
10/18/2006EP1711542A2 Directly photodefinable polymer compositions and methods thereof
10/18/2006EP1711278A2 Polyhedral oligomeric silsesquioxanes and metallized polyhedral oligomeric silsesquioxanes as coatings, composites and additives
10/18/2006EP1667208A9 Method for producing bonded wafer
10/18/2006EP1552526B1 Magnetic element utilizing spin transfer and an mram device using the magnetic element
10/18/2006EP1444284B1 Planarized microelectronic substrates
10/18/2006EP1428064B1 Electrostatic discharge protection for pixellated electronic device
10/18/2006EP1421630B1 Method of depositing an oxide layer on a substrate and a photovoltaic cell using said substrate
10/18/2006EP1419528B1 Interconnect module with reduced power distribution impedance
10/18/2006EP1415338B1 Dual layer hard mask for edram gate etch process
10/18/2006EP1372864B1 Manifolded fluid delivery system
10/18/2006EP1336095B1 Measurement of surface defects
10/18/2006EP1311825B1 Method for fast and accurate determination of the minority carrier diffusion length from simultaneously measured surface photovoltages
10/18/2006EP1307783B1 Photoinitiated reactions
10/18/2006EP1275029A4 Scanning framing blade apparatus
10/18/2006EP1270694B1 Porous adhesive sheet, semiconductor wafer with porous adhesive sheet, and method of manufacture thereof
10/18/2006EP1260021B1 Structural element with an integrated high-frequency circuit
10/18/2006EP1229095B1 Adhesive agent, method for connecting wiring terminals and wiring structure
10/18/2006EP1218798B1 Method for generating a set of masks for manufacture of an integrated circuit
10/18/2006EP1110236B1 Non-uniform minority carrier lifetime distributions in high performance silicon power devices
10/18/2006EP1038308B1 Lateral thin-film soi device
10/18/2006EP0991126B1 Method of manufacturing an electrooptic device
10/18/2006EP0948033B1 Gas composition for dry etching and process of dry etching
10/18/2006EP0710402B1 Integrated laser structuring process for thin film solar cells
10/18/2006EP0656149B1 Improved back-side hydrogenation technique for defect passivation in silicon solar cells
10/18/2006CN2829269Y Lamp assembly and base processing chamber
10/18/2006CN2829095Y Diode for vehicle
10/18/2006CN2829092Y Module circuit assembly
10/18/2006CN2828834Y Device for testing thermal relaxation time of semiconductor laser
10/18/2006CN2828768Y Automatic detection system of LED
10/18/2006CN1849855A Electronic component mounting module
10/18/2006CN1849853A Substrate and method of manufacturing the same
10/18/2006CN1849847A Highly efficient organic light emitting device using substrate having nanosized hemispherical recesses and method for preparing the same
10/18/2006CN1849711A Adjustment of masks by re-flow
10/18/2006CN1849710A High voltage ldmos transistor having an isolated structure
10/18/2006CN1849706A Chip on flex tape with dimension retention pattern
10/18/2006CN1849705A Method for separately optimizing thin gate dielectric of pmos and nmos transistors within the same semiconductor chip and device manufactured thereby
10/18/2006CN1849704A Methods of forming deuterated silicon nitride-containing materials
10/18/2006CN1849703A Atomic layer deposition of high k metal oxide
10/18/2006CN1849702A Improved method of etching silicon
10/18/2006CN1849701A Plasma processing device and ashing method
10/18/2006CN1849700A Multilayer substrate cleaning method, substrate bonding method, and bonded wafer manufacturing method