Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
10/2006
10/26/2006WO2006112080A1 Semiconductor device comprising a gate electrode
10/26/2006WO2006112062A1 Resin mold and process for producing molded product using the same
10/26/2006WO2006112056A1 Eeprom array with well contacts
10/26/2006WO2006112053A1 Silicon single crystal growing method, silicon wafer and soi substrate using such silicon wafer
10/26/2006WO2006112049A1 Magnetic random access memory
10/26/2006WO2006112006A1 Nonvolatile semiconductor storage device
10/26/2006WO2006111888A1 A strained integrated circuit and a method of manufacturing the same
10/26/2006WO2006111804A1 Semiconductor manufacturing method and semiconductor device
10/26/2006WO2006111617A1 Reactor
10/26/2006WO2006111533A1 A method of bonding two wafers made out of materials selected from semiconductor materials
10/26/2006WO2006111530A1 Improvements in transistor manufacture
10/26/2006WO2006111247A1 Device and method for application of an even thin fluid layer to substrates
10/26/2006WO2006111203A1 METHOD OF FABRICATING A MOS DEVICE WITH NON-SiO2 GATE DIELECTRIC
10/26/2006WO2006111193A1 Apparatus for cleaning of circuit substrates
10/26/2006WO2006111097A1 An ultrasonic wire bonding method and bonding apparatus
10/26/2006WO2006076991A3 Method for producing a field-effect transistor, field-effect transistor and integrated circuit arrangement
10/26/2006WO2006069368A3 Method and system for performing die attach using a flame
10/26/2006WO2006060528A3 A method for forming a semiconductor device with gate sidewall apacers of specific dimensions
10/26/2006WO2006049912A3 Cmp composition comprising surfactant
10/26/2006WO2006041630A3 Low temperature selective epitaxial growth of silicon germanium layers
10/26/2006WO2006026010A3 Forming abrupt source drain metal gate transistors
10/26/2006WO2006014241A3 Activation of carbon nanotubes for field emission applications
10/26/2006WO2006012113A3 Dielectric film with low coefficient of thermal expansion (cte) using liquid crystalline resin
10/26/2006WO2006010639A3 Method of manufacturing an electronic circuit device through a direct write technique
10/26/2006WO2006007077A3 Composition and method for low temperature chemical vapor deposition of silicon-containing films including silicon carbonitride and silicon oxycarbonitride films
10/26/2006WO2005125298A3 Method for manufacturing an electronics module comprising a component electrically connected to a conductor- pattern layer
10/26/2006WO2005094482A3 Tray for storing and transporting semi-conductor and other microelectronic components
10/26/2006WO2005086226A8 Heat treatment for improving the quality of a taken thin layer
10/26/2006WO2004112095A3 Thermoplastic fluxing underfill composition and method
10/26/2006WO2004003973A3 Ion implantation device and method
10/26/2006US20060242612 A crosstalk checking method using paralled line length extraction
10/26/2006US20060241894 Position detecting device and position detecting method
10/26/2006US20060241803 Substrate processing system managing apparatus information of substrate processing apparatus
10/26/2006US20060241012 Cleaning liquid used in process for forming dual damascene structure and a process for treating substrate therewith
10/26/2006US20060241006 Contains abrasive grains such as magnesium oxide (MnO, MnO2, Mn2O3, Mn3O4), with hydrogen peroxide as solvent, washing with hydrofluoric acid solution, spin drying
10/26/2006US20060240749 Chemical Mechanical Polishing Apparatus and Methods Using a Polishing Surface with Non-Uniform Rigidity
10/26/2006US20060240748 Method of manufacturing abrasive composition
10/26/2006US20060240681 suitable for mass production, high transition voltage, and excellent cyclic performance; charge transfer compound for organic electroluminescent displays (OLED) comprises a quinomethane compound such as 1,3-bis(p-methoxyphenyl (4-oxo-3,5-di-tert-butyl-cyclohexa-2,5-dien-1-ylidene)methyl)thiophene
10/26/2006US20060240680 Substrate processing platform allowing processing in different ambients
10/26/2006US20060240679 Method of manufacturing semiconductor device having reaction barrier layer
10/26/2006US20060240678 Method of forming a LP-CVD oxide film without oxidizing an underlying metal film
10/26/2006US20060240677 Method for manufacturing semiconductor device and substrate processing apparatus
10/26/2006US20060240676 Lawn and garden battery clamp
10/26/2006US20060240675 Removal of silicon oxycarbide from substrates
10/26/2006US20060240674 Method for Manufacturing Semiconductor Device
10/26/2006US20060240673 Method of forming bit line in semiconductor device
10/26/2006US20060240672 Polishing liquid composition
10/26/2006US20060240671 Method of reducing outgassing pollution
10/26/2006US20060240670 Etching of algainassb
10/26/2006US20060240669 Method of forming vapor-deposited film and method of manufacturing EL display device
10/26/2006US20060240668 Semiconductor device with metallic electrodes and a method for use in forming such a device
10/26/2006US20060240667 Method for manufacturing semiconductor device
10/26/2006US20060240666 Method of forming silicide
10/26/2006US20060240665 Methods of producing integrated circuit devices utilizing tantalum amine derivatives
10/26/2006US20060240664 Method of manufacturing multi-layered substrate
10/26/2006US20060240663 Methods of forming a resistance variable element
10/26/2006US20060240662 Method to perform selective atomic layer deposition of zinc oxide
10/26/2006US20060240661 Method of preventing damage to porous low-K materials during resist stripping
10/26/2006US20060240660 Semiconductor stucture and method of manufacturing the same
10/26/2006US20060240659 Metal interconnection structure of a semiconductor device having low resistance and method of fabricating the same
10/26/2006US20060240658 Gap control between interposer and substrate in electronic assemblies
10/26/2006US20060240657 Semiconductor device and method of manufacturing the same
10/26/2006US20060240656 Method for forming contact of semiconductor device by using solid phase epitaxy process
10/26/2006US20060240655 Semiconductor device having contact plug formed in double structure by using epitaxial stack and metal layer and method for fabricating the same
10/26/2006US20060240654 Process of forming a self-aligned contact in a semiconductor device
10/26/2006US20060240653 One-device non-volatile random access memory cell
10/26/2006US20060240652 Very low dielectric constant plasma-enhanced cvd films
10/26/2006US20060240651 Methods and apparatus for adjusting ion implant parameters for improved process control
10/26/2006US20060240650 Semiconductor device having a plurality of different layers and method therefor
10/26/2006US20060240649 Method for depositing silicon
10/26/2006US20060240648 Atmospheric glow discharge with concurrent coating deposition
10/26/2006US20060240647 Film control method and device thereof
10/26/2006US20060240646 Method of removing residual contaminants from an environment
10/26/2006US20060240645 Method and system for source switching and in-situ plasma bonding
10/26/2006US20060240644 Substrate with determinate thermal expansion coefficient
10/26/2006US20060240643 Method for producing a polymer structure on a substrate surface
10/26/2006US20060240642 Method of bonding two wafers of semiconductor materials
10/26/2006US20060240641 Apparatus and method for making circuitized substrates in a continuous manner
10/26/2006US20060240640 Isostatic pressure assisted wafer bonding method
10/26/2006US20060240639 Fine patterning method for semiconductor device
10/26/2006US20060240638 Method for the elimination of the effects of defects on wafers
10/26/2006US20060240637 Methods of forming semiconductor constructions
10/26/2006US20060240636 Trench isolation methods of semiconductor device
10/26/2006US20060240635 Self-aligned STI SONOS
10/26/2006US20060240634 DRAM access transistor and method of formation
10/26/2006US20060240633 Methods and systems for on-column protein delipidation
10/26/2006US20060240632 Semiconductor device including air gap between semiconductor substrate and L-shaped spacer and method of fabricating the same
10/26/2006US20060240631 Method for manufacturing a solid-state image capturing device and electric information device
10/26/2006US20060240630 Methods of making substitutionally carbon-doped crystalline Si-containing materials by chemical vapor deposition
10/26/2006US20060240629 Self correcting suppression of threshold voltage variation in fully depleted transistors
10/26/2006US20060240628 High voltage device and method for forming the same
10/26/2006US20060240627 Method for manufacturing semiconductor device capable of improving breakdown voltage characteristics
10/26/2006US20060240626 Write once read only memory employing charge trapping in insulators
10/26/2006US20060240625 Power semiconductor device having improved performance and method
10/26/2006US20060240624 Single transistor RAM cell and method of manufacture
10/26/2006US20060240623 Nonvolatile memory devices having gate structures doped by nitrogen and methods of fabricating the same
10/26/2006US20060240622 Multi-channel semiconductor device and method of manufacturing the same
10/26/2006US20060240621 Double gate transistors having at least two polysilicon patterns on a thin body used as active region and methods of forming the same
10/26/2006US20060240620 Semiconductor device and method of manufacturing the same
10/26/2006US20060240619 Semiconductor memory device and method of manufacturing the same