Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
11/2006
11/02/2006EP1717562A1 A method for packaging integrated sensors
11/02/2006EP1717344A1 Method for processing substrate, catalyst process liquid, and substrate processing apparatus
11/02/2006EP1717338A1 Thin film forming apparatus
11/02/2006EP1717286A1 Method of surface treatment of group III nitride crystal film, group III nitride crystal substrate, group III nitride crystal substrate with epitaxial layer, and semiconductor device
11/02/2006EP1717285A1 Self stabilizing CMP composition for metal layers
11/02/2006EP1717261A1 Polymer compound, photoresist composition containing such polymer compound, and method for forming resist pattern
11/02/2006EP1717195A1 Trilayered beam MEMS device and related methods
11/02/2006EP1717194A1 Trilayered Beam MEMS device and related methods
11/02/2006EP1717193A1 Trilayered beam MEMS device and related methods
11/02/2006EP1717001A1 Method for manufacturing semiconductor wafers, method for their slicing and wire saw used for the same
11/02/2006EP1716964A1 Method for manufacturing semiconductor device and laser irradiation apparatus
11/02/2006EP1716960A1 Laser processing method and device
11/02/2006EP1716899A2 Liquid cooled trap
11/02/2006EP1716731A1 Screen printing apparatus and screen printing method
11/02/2006EP1716599A2 Trench-gate semiconductor devices and the manufacture thereof
11/02/2006EP1716598A1 Method of fabricating a sige semiconductor structure
11/02/2006EP1716593A1 Filling of insulation trenches using cmos-standard processes for creating dielectrically insulated areas on a soi disk
11/02/2006EP1716592A1 FORMATION OF PATTERNED SILICON-ON-INSULATOR (SOI)/SILICON-ON-NOTHING (SON) COMPOSITE STRUCTURE BY POROUS Si ENGINEERING
11/02/2006EP1716591A2 Buried guard ring and radiation hardened isolation structures and fabrication methods
11/02/2006EP1716590A1 Assembly of a semiconductor die attached to substrate with oxazoline derivative bearing an electron donor or acceptor functionality
11/02/2006EP1716589A1 Method for selective etching
11/02/2006EP1716588A1 Imprinting apparatus with independently actuating separable modules
11/02/2006EP1716587A2 Process and apparatus for removing residues from semiconductor substrates
11/02/2006EP1716586A1 Device for inspecting and rotating electronic components
11/02/2006EP1716578A2 Nanoscale metal paste for interconnect and method of use
11/02/2006EP1716389A2 Continuously varying offset mark and methods of determining overlay
11/02/2006EP1716269A2 Process for producing sio2-containing insulating layers on chips
11/02/2006EP1716072A2 Integrated getter area for wafer level encapsulated microelectromechanical systems
11/02/2006EP1715996A1 Hot pressing ceramic distortion control
11/02/2006EP1715979A2 Multi-step, in-situ pad conditioning system and method for chemical mechanical planarization
11/02/2006EP1715977A1 Repair soldering head having supply channel for a heat transfer medium and a return cha nnel for said heat transfer medium, and the use thereof
11/02/2006EP1715961A2 Spin-on protective coatings for wet-etch processing of microelectronic substrates
11/02/2006EP1514094B1 Vision system
11/02/2006EP1512112A4 Use of overlay diagnostics for enhanced automatic process control
11/02/2006EP1502265B1 Ferroelectric memory
11/02/2006EP1474826B1 Polysilicon bipolar transistor and method for producing the same
11/02/2006EP1449033B1 Defective pixel compensation method
11/02/2006EP1415320B1 Method of measuring the performance of a scanning electron microscope
11/02/2006EP1297384B1 Device and method for cleaning articles used in the production of semiconductor components
11/02/2006EP1295322B1 Two steps chemical mechanical polishing process
11/02/2006EP1277223B1 Electrode apparatus for a plasma reactor
11/02/2006EP1222687A4 IMPROVED PECVD AND CVD PROCESSES FOR WNx DEPOSITION
11/02/2006EP1194022B1 Multilayer printed wiring board and method of manufacturing multilayer printed wiring board
11/02/2006EP1097467B1 Ic stack utilizing secondary leadframes
11/02/2006EP1024965B9 Process for removing residues from a semiconductor substrate
11/02/2006EP1021826B1 Method for patterning integrated circuit conductors
11/02/2006EP0975025B1 Photoelectric conversion integrated circuit device
11/02/2006EP0948037B1 Method for manufacturing a silicon epitaxial wafer
11/02/2006EP0920054B1 Method for manufacturing a semiconductor memory
11/02/2006EP0890187B1 A method for producing a semiconductor device by the use of an implanting step
11/02/2006EP0774162B1 Manufacturing dual sided wire bonded integrated circuit chip packages using offset wire bonds and support block cavities
11/02/2006DE4418352B4 Halbleiterbauelement mit einer Siliziumsäulen-Transistorstruktur mit ringförmig umgebendem Gate sowie Verfahren zu dessen Herstellung A semiconductor device comprising a silicon pillar having annularly surrounding gate transistor structure and process for its preparation
11/02/2006DE202006011604U1 Substratträger für eine Halbleiterbehandlungskammer Substrate carrier for a semiconductor processing chamber
11/02/2006DE19655310B4 Adhesively bonding lead frame of semiconductor component to heat sink - using cured epoxy resin layer and thermoplastic material or partly cured epoxy! resin
11/02/2006DE112004002307T5 Transistor mit Silizium- und Kohlenstoffschicht in dem Kanalbereich Transistor with silicon and carbon layer in the channel region
11/02/2006DE112004002266T5 Dielektrischer Film mit sehr geringer Dielektrizitätskonstante für Kupferverbindungen Dielectric film with a very low dielectric constant for copper compounds
11/02/2006DE112004002155T5 Verfahren zum Integrieren eines Gatedielektrikums mit großem ε in einem Transistorherstellungsprozess A method for integrating a gate dielectric in a transistor with large ε manufacturing process
11/02/2006DE10337757B4 Halbleiterwafer mit asymmetrischem Kantenprofil und Herstellungsverfahren hierfür A semiconductor wafer with an asymmetric edge profile and manufacturing method thereof
11/02/2006DE10337562B4 Herstellungsverfahren für einen Grabenkondensator mit einem Isolationskragen, der über einen vergrabenen Kontakt einseitig mit einem Substrat elektrisch verbunden ist, insbesondere für eine Halbleiterspeicherzelle Manufacturing method for a grave capacitor with an insulation collar, which is electrically connected through a buried contact on one side with a substrate, in particular for a semiconductor memory cell
11/02/2006DE10250829B4 Nichtflüchtige Speicherzelle, Speicherzellen-Anordnung und Verfahren zum Herstellen einer nichtflüchtigen Speicherzelle A non-volatile memory cell, memory cell arrangement and method of manufacturing a non-volatile memory cell
11/02/2006DE10241973B4 Verfahren zur Epitaxie auf Silizium und nach dem Verfahren hergestelltes Halbleiterbauelement A method for epitaxial growth on silicon and the procedure semiconductor component produced
11/02/2006DE10228774B4 Verfahren zum Bilden feiner Muster in Halbleiteranordnungen A method for forming fine patterns in semiconductor devices
11/02/2006DE10225925B4 Ätzverfahren unter Verwendung einer Photolack-Ätzbarriere Etching processes using a photoresist etch
11/02/2006DE10220964B4 Anordnung zur Herstellung von Kristallstäben mit definiertem Querschnitt und kolumnarer polykristalliner Struktur mittels tiegelfreier kontinuierlicher Kristallisation Arrangement for producing crystal rods having a defined cross-section and a columnar polycrystalline structure by means of crucible-free continuous crystallization
11/02/2006DE102005062964A1 Dielectric structure of capacitor has hafnium oxide layer and dielectric layer based on material whose dielectric constant is same or more than that of HfO2 layer and has a dielectric nano composite structure
11/02/2006DE102005031702A1 Memory device e.g. dynamic random access memory, has transistor such as recessed transistor and fin transistor, with active area protruding from preset portion of semiconductor substrate, and recess formed in channel area
11/02/2006DE102005020060A1 Low-k dielectric layer patterning method for integrated circuits, involves forming patterned hard mask above low-k dielectric layer of semiconductor metallization layer
11/02/2006DE102005020016A1 Semiconductor chip, e.g. air flow sensor chip, assembling method, involves assembling chip mounting area on carrier surface area by flip-chip technology, and assembling profile device mounting area such that chip is embedded into device
11/02/2006DE102005018984A1 Verfahren und Vorrichtung zum Herstellen von elektronischen Bauteilen Method and apparatus for the manufacture of electronic components
11/02/2006DE102005018941A1 Power semiconductor device, e.g. power transistor or power integrated circuit (IC), has standard housing provided with external connectors which are arranged and electrically connected to flat leads outside of or within standard housing
11/02/2006DE102005018161A1 Rapid thermal processing (RTP) device used in semiconductor device manufacture, has retaining ring that has raised portions formed on outer radial periphery of retaining zone, such that edge of held substrate rests on raised portions
11/02/2006DE102005016518B3 Substrate replacing and separating device for e.g. wafers, has gripping and transfer mechanism that has gripping components for holding substrates chiseled from substrate block on carrier system, and tilting mechanism for held substrates
11/02/2006DE102005015502A1 Silicon substrate isolation trenches etching method for use during manufacturing of DRAM cells, involves aligning etching gas components such that etching depth at two different sized upper surface sections of substrate has same size
11/02/2006DE102005004708B4 Verfahren zur Herstellung integrierter Schaltkreise mit mindestens einem Silizium-Germanium-Heterobipolartransistor A process for the production of integrated circuits having at least one silicon-germanium heterobipolar
11/02/2006DE10125800B4 Speicherbaustein mit einer Speicherzelle und Verfahren zur Herstellung eines Speicherbausteins Memory device having a memory cell and method for manufacturing a memory device
11/02/2006DE10045019B4 Verfahren zur Herstellung einer nichtflüchtigen Halbleiterspeichervorrichtung A method of manufacturing a nonvolatile semiconductor memory device
11/02/2006CA2650213A1 Production of light from sol-gel derived thin films made with lanthanide doped nanoparticles, and preparation thereof
11/02/2006CA2599401A1 Composition and method for polishing a sapphire surface
11/01/2006CN2833883Y Silicon wafer basket
11/01/2006CN2833882Y Floating suction nozzle mounting pole for welding head of chip loader
11/01/2006CN2833881Y Full-automatic chip loader
11/01/2006CN2833880Y Solid crystal welded wire laser heater
11/01/2006CN2832753Y Conveying system and production system
11/01/2006CN2832722Y Wafer container
11/01/2006CN1857044A Method and apparatus for efficient temperature control using a contact volume
11/01/2006CN1856915A Nitride semiconductor device and method for manufacturing same
11/01/2006CN1856888A OLED having non-hole blocking buffer layer
11/01/2006CN1856881A Micromirror array device with a small pitch size
11/01/2006CN1856880A Dynamic control of capacitance elements in field effect semiconductor devices
11/01/2006CN1856878A Method of forming a semiconductor package and structure thereof
11/01/2006CN1856876A Method for producing a multifunctional dielectric layer on a substrate
11/01/2006CN1856875A Semiconductor device, method of manufacturing same, identification label and information carrier
11/01/2006CN1856874A Multi-purpose metallic sealing
11/01/2006CN1856873A Method of manufacturing a multilayer semiconductor structure with reduced ohmic losses
11/01/2006CN1856872A Adjustable self-aligned air gap dielectric for low capacitance wiring
11/01/2006CN1856871A System and method using self-assembled nano structures in the design and fabrication of an integrated circuit micro-cooler
11/01/2006CN1856870A Method of filling gaps and methods of depositing materials using high density plasma chemical vapor deposition
11/01/2006CN1856869A Method for forming film
11/01/2006CN1856868A Method for treating semiconductor processing components and components formed thereby
11/01/2006CN1856867A Method for the elimination of the effects of defects on wafers