H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof

Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
11/2006
11/02/2006	US20060246663 Method for reducing single bit data loss in a memory circuit
11/02/2006	US20060246662 Semiconductor device and method of manufacturing the same
11/02/2006	US20060246661 Method of forming a thin layer and method of manufacturing a non-volatile semiconductor device using the same
11/02/2006	US20060246660 Flash memory device capable of erasing flash blocks in soi substrate based on back-bias, method for manufacturing the same, and flash block erasion method and structure thereof
11/02/2006	US20060246659 Method for fabricating semiconductor device
11/02/2006	US20060246658 A capacitor electrode having an interface layer of different chemical composition formed on a bulk layer
11/02/2006	US20060246657 Method of forming an insulation layer structure and method of manufacturing a semiconductor device using the same
11/02/2006	US20060246656 Manufacturing method for a trench capacitor having an isolation collar electrically connected with a substrate on a single side via a buried contact for use in a semiconductor memory cell
11/02/2006	US20060246655 Memory of forming a coupling dielectric ta2o5 in a memory device
11/02/2006	US20060246654 Semiconductor device with resistor pattern and method of fabricating the same
11/02/2006	US20060246653 High-performance one-transistor memory cell
11/02/2006	US20060246652 Method of forming a semiconductor device and structure therefor
11/02/2006	US20060246651 Semiconductor CMOS devices and methods with NMOS high-k dielectric present in core region that mitigate damage to dielectric materials
11/02/2006	US20060246650 Recessed clamping diode fabrication in trench devices
11/02/2006	US20060246649 Method for forming gate structure in flash memory device
11/02/2006	US20060246648 Alignment key structure in a semiconductor device and method of forming the same
11/02/2006	US20060246647 Semiconductor CMOS devices and methods with NMOS high-k dielectric formed prior to core PMOS silicon oxynitride dielectric formation using direct nitridation of silicon
11/02/2006	US20060246646 MOS device and a process for manufacturing MOS devices using a dual-polysilicon layer technology with side contact
11/02/2006	US20060246645 A MOS Transistor with a Three-Step Source/Drain Implant
11/02/2006	US20060246644 Semiconductor device and method for manufacturing semiconductor device
11/02/2006	US20060246643 Memory device and semiconductor device
11/02/2006	US20060246642 Semiconductor power device with passivation layers
11/02/2006	US20060246641 Technique for forming a contact insulation layer with enhanced stress transfer efficiency
11/02/2006	US20060246640 Method for manufacturing semiconductor device
11/02/2006	US20060246639 Thin film transistor and method of fabricating the same
11/02/2006	US20060246638 Semiconductor Device and Method of Manufacturing the Same
11/02/2006	US20060246637 Sidewall gate thin-film transistor
11/02/2006	US20060246636 Semiconductor device and method of manufacturing the same
11/02/2006	US20060246635 Semiconductor device, method for manufacturing the same, circuit substrate, electro-optical apparatus, and electronic equipment
11/02/2006	US20060246634 Semiconductor device and method of fabricating thereof
11/02/2006	US20060246633 Manufacturing method of thin film transistor, display device using thin film transistor, and electronic device incorporating display device
11/02/2006	US20060246632 Thin film transistor, thin film transistor subsrate, electronic apparatus and process for producing polycrystalline semiconductor thin film
11/02/2006	US20060246631 Anti-stiction technique for electromechanical systems and electromechanical device employing same
11/02/2006	US20060246630 Electronic parts packaging structure and method of manufacturing the same
11/02/2006	US20060246629 Semiconductor package with controlled solder bump wetting and fabrication method therefor
11/02/2006	US20060246628 Chipcard with contact areas and method for producing contact areas
11/02/2006	US20060246627 Technique for enhancing thermal and mechanical characteristics of an underfill material of a substrate/die assembly
11/02/2006	US20060246626 Methods for applying front side and edge protection material to electronic devices at the wafer level, devices made by the methods, and systems including the devices
11/02/2006	US20060246625 Method for fabricating a semiconductor device having a heat radiation layer
11/02/2006	US20060246624 Semiconductor device with semiconductor chip and rewiring layer and method for producing the same
11/02/2006	US20060246623 Semiconductor device having a plurality of semiconductor chips and method for manufacturing the same
11/02/2006	US20060246622 Stacked die package for peripheral and center device pad layout device
11/02/2006	US20060246621 Microelectronic die including thermally conductive structure in a substrate thereof and method of forming same
11/02/2006	US20060246619 Electro-optical device and method of manufacturing the same, element driving device and method of manufacturing the same, element substrate, and electronic apparatus
11/02/2006	US20060246618 Zn-base semiconductor light emitting device and method of fabricating the same
11/02/2006	US20060246617 Fabrication method of light emitting diode package
11/02/2006	US20060246616 Structure of laser diode and method of manufacturing the same
11/02/2006	US20060246615 Method of manufacturing vertical cavity surface emitting laser
11/02/2006	US20060246614 Method for manufacturing gallium nitride-based semiconductor device
11/02/2006	US20060246613 Electroluminescent devices
11/02/2006	US20060246612 Light emitting devices with active layers that extend into opened pits
11/02/2006	US20060246611 Method of and apparatus for controlling probe tip sanding in semiconductor device testing equipment
11/02/2006	US20060246609 Dynamic metal fill for correcting non-planar region
11/02/2006	US20060246608 Fabrication alignment technique for light guide screen
11/02/2006	US20060246607 Method for forming a storage cell capacitor compatible with high dielectric constant materials
11/02/2006	US20060246606 Self-aligned cross point resistor memory array
11/02/2006	US20060246605 Methods for Fabricating Reduced Floating Body Effect Static Random Access Memory Cells
11/02/2006	US20060246604 Methods of forming magnetic memory devices and resulting magnetic memory devices
11/02/2006	US20060246550 Construction of antibody using mrl/lpr mouse
11/02/2006	US20060246384 Developing method and apparatus
11/02/2006	US20060246380 Micropattern forming material and method for forming micropattern
11/02/2006	US20060246362 Mask data creation method
11/02/2006	US20060246361 Irradiating laser light onto glass substrate surface to form a pit used as a marker; preparing substrate information including identification, symbols, unique chemical/physical/optical properties, surface shape, material, and defect; correlation with computers; photoresists
11/02/2006	US20060246314 Method of producing a heat dissipation substrate of molybdenum powder impregnated with copper with rolling in primary and secondary directions
11/02/2006	US20060246303 Coating composition and low dielectric siliceous material produced by using same
11/02/2006	US20060246279 Method of producing laser-processed product and adhesive sheet, for laser processing used therefor
11/02/2006	US20060246211 Method of forming film upon a substrate
11/02/2006	US20060245906 Device for accommodating disk-shaped objects and apparatus for handling objects
11/02/2006	US20060245856 Substrate edge grip apparatus
11/02/2006	US20060245855 Substrate processing apparatus
11/02/2006	US20060245854 Dual cassette load lock
11/02/2006	US20060245853 Substrate transport apparatus and substrate transport method
11/02/2006	US20060245852 Load lock apparatus, load lock section, substrate processing system and substrate processing method
11/02/2006	US20060245851 Pod cover removing-installing apparatus
11/02/2006	US20060245850 Method of assembling substrate transfer device and transfer system unit for the same
11/02/2006	US20060245849 Foup opener
11/02/2006	US20060245848 Substrate cassette
11/02/2006	US20060245847 Transfer chamber between workstations
11/02/2006	US20060245846 High speed substrate aligner apparatus
11/02/2006	US20060245280 Integrated circuit having a non-volatile memory cell transistor as a fuse device
11/02/2006	US20060245263 Nonvolatile semiconductor memory
11/02/2006	US20060245256 Split gate flash memory cell with ballistic injection
11/02/2006	US20060245245 Non-volatile memory cell using high-k material and inter-gate programming
11/02/2006	US20060245244 High-performance one-transistor memory cell
11/02/2006	US20060245239 Semiconductor integrated circuit
11/02/2006	US20060245138 Perforated plate for water chuck
11/02/2006	US20060244974 Non-destructive testing system
11/02/2006	US20060244958 System for detection of wafer defects
11/02/2006	US20060244957 System for detection of wafer defects
11/02/2006	US20060244956 System for detection of wafer defects
11/02/2006	US20060244940 Exposure method and apparatus and device producing method
11/02/2006	US20060244886 Process of surface treatment, surface treating device, surface treated plate, and electro-optic device, and electronic equipment
11/02/2006	US20060244475 Compliant contact pin test assembly and methods thereof
11/02/2006	US20060244473 Device and method for testing integrated circuit dice in an integrated circuit module
11/02/2006	US20060244469 Segmented Contactor
11/02/2006	US20060244435 Time limit function utilization apparatus
11/02/2006	US20060244434 Time limit function utilization apparatus
11/02/2006	US20060244152 Barrier film integrity on porous low k dielectrics by application of a hydrocarbon plasma treatment
11/02/2006	US20060244148 Solder deposition on wafer backside for thin-die thermal interface material
11/02/2006	US20060244144 Semiconductor device including multi-layered interconnection and method of manufacturing the device

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