Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
12/2006
12/14/2006US20060279201 Droplet discharge method, electro optical device and electronic apparatus
12/14/2006US20060279200 Droplet discharge method, electro-optic device, and electronic apparatus
12/14/2006US20060279141 Lithographic apparatus, device manufacturing method, and device manufactured thereby
12/14/2006US20060279021 Apparatus and method for manufacturing a semiconductor device
12/14/2006US20060279005 Techniques for forming passive devices during semiconductor back-end processing
12/14/2006US20060279004 Mold, pattern forming method, and pattern forming apparatus
12/14/2006US20060279003 Semiconductor device having an alignment mark formed by the same material with a metal post
12/14/2006US20060279000 Pre-solder structure on semiconductor package substrate and method for fabricating the same
12/14/2006US20060278999 Substrate for Pre-Soldering Material and Fabrication Method Thereof
12/14/2006US20060278998 Integrated electronic chip and interconnect device and process for making the same
12/14/2006US20060278996 Active packaging
12/14/2006US20060278992 Post & penetration interconnection
12/14/2006US20060278990 Etch stop in a damascene interconnect structure
12/14/2006US20060278982 Metal bump with an insulation for the side walls and method of fabricating a chip with such a metal bump
12/14/2006US20060278967 Method for manufacturing an electronic module and an electronic module
12/14/2006US20060278959 Method for reducing leakage current in a semiconductor device
12/14/2006US20060278956 Semiconductor wafer with non-rectangular shaped dice
12/14/2006US20060278954 Semiconductor device having interlayer insulating film covered with hydrogen diffusion barrier film and its manufacture method
12/14/2006US20060278952 Semiconductor device and fabrication process thereof
12/14/2006US20060278951 Metal oxide semiconductor (MOS) field effect transistor having trench isolation region and method of fabricating the same
12/14/2006US20060278942 Antistiction MEMS substrate and method of manufacture
12/14/2006US20060278936 Semiconductor device and fabrication method therefor
12/14/2006US20060278934 Semiconductor device and method of manufacturing semiconductor device
12/14/2006US20060278920 Metal oxide semiconductor field-effect transistor (MOSFET) and method of fabricating the same
12/14/2006US20060278917 Floating gate structures
12/14/2006US20060278915 FinFET split gate EEPROM structure and method of its fabrication
12/14/2006US20060278913 Non-volatile memory cells without diffusion junctions
12/14/2006US20060278909 Mis transistor and cmos transistor
12/14/2006US20060278908 Write line design in MRAM
12/14/2006US20060278907 Semiconductor element, semiconductor sensor and semiconductor memory element
12/14/2006US20060278905 CMOS pixel with dual gate PMOS
12/14/2006US20060278902 Nano structure electrode design
12/14/2006US20060278894 Intermeshed guard bands for multiple voltage supply structures on an integrated circuit, and methods of making same
12/14/2006US20060278878 Semiconductor device equipped with semiconductor circuits composed of semiconductor elements and processes for production thereof
12/14/2006US20060278870 Semiconductor device having a second level of metallization formed over a first level with minimal damage to the first level and method
12/14/2006US20060278865 Non-polar (Al,B,In,Ga)N quantum well and heterostructure materials and devices
12/14/2006US20060278613 Method and device for removing material from a three-dimensional surface in a multi-layered manner by means of a laser, using a polygon network which is described by a mathematical function and represents the surface
12/14/2006US20060278612 Manufacturing method of semiconductor integrated circuit device
12/14/2006US20060278341 Process chamber used in manufacture of semiconductor device, capable of reducing contamination by particulates
12/14/2006US20060278331 Membrane-based chip tooling
12/14/2006US20060278324 Mounting Device and Method Thereof
12/14/2006US20060278254 Method and apparatus for treating a substrate with dense fluid and plasma
12/14/2006US20060278253 Method and apparatus for wafer cleaning
12/14/2006US20060278166 Vaporizer, various devices using the same, and vaporizing method
12/14/2006US20060278157 Silicon wafer and process for producing it
12/14/2006US20060277747 Methods for fabricating giant magnetoresistive (GMR) devices
12/14/2006DE4318676B4 Verfahren zur Verringerung einer teilchenförmigen Konzentration in Arbeitsfluiden A method for reducing a particulate concentration in working fluids
12/14/2006DE4228529B4 Verfahren zum Passivieren von Halbleiterscheiben A method for the passivation of semiconductor wafers
12/14/2006DE112004002641T5 Verfahren zur Herstellung eines verformten FinFET-Kanals A process for producing a strained FinFET channel
12/14/2006DE112004002310T5 Trench-Metalloxid-Halbleiter-Feldeffekttransisstor mit geschlossenen Zellen Trench metal-oxide-semiconductor Feldeffekttransisstor closed cell
12/14/2006DE112004002107T5 Selbstjustiertes Damaszener-Gate Self Tuned Damascus Gate
12/14/2006DE10355273B4 Magnetische Speichervorichtungen mit wahlfreiem Zugang (MRAM) mit nicht parallelen Haupt- und Bezugs-Magnetwiderständen Magnetic Speichervorichtungen random access memory (MRAM) with non-parallel main and reference magnetic resistors
12/14/2006DE10314190B4 Thermosensitives Flussratenerfassungselement und Verfahren zu dessen Herstellung Thermosensitive flow rate detecting element and process for its preparation
12/14/2006DE10309607B9 Verfahren zur Verkapselung von funktionellen Komponenten eines optoelektronischen Bauelements A process for the encapsulation of functional components of an optoelectronic component
12/14/2006DE10208166B4 Verfahren zur Herstellung von Metallleitungen mit verbesserter Gleichförmigkeit auf einem Substrat A process for the production of metal pipes with improved uniformity on a substrate
12/14/2006DE102006019709A1 Wafer e.g. semiconductor wafer, cutting method for manufacturing semiconductor, involves local vacuum sucking of reference cutting lines through foil for exerting bending stress on lines, such that lines are cut by bending stress
12/14/2006DE102006003584A1 Halbleiter-Testschnittstelle A semiconductor test interface
12/14/2006DE102005057400A1 Semiconductor component manufacturing method, involves filling gap between upper side of semiconductor chip and upper side of carrier with plastic mass, where edge sides and back side of chip are embedded in gap
12/14/2006DE102005042072A1 Vertical electrical contact connections e.g. micro-vias, producing method for silicon carbide-wafer, involves laser boring of passage holes through wafer and active layers and applying antiwetting layer in area of openings of holes
12/14/2006DE102005027800A1 Vorrichtung zum mehrfachen Trennen eines flachen Werkstückes aus einem spröden Material mittels Laser A device for multiple separation of a flat workpiece of a brittle material by means of laser
12/14/2006DE102005027120A1 Verfahren zur Inspektion von Halbleiterwafern unter Berücksichtigung des Saw-Designs A method for inspection of semiconductor wafers in consideration of the SAW Designs
12/14/2006DE102005026339A1 Kupfer(I)perfluorcarboxylat-Komplexe und ihre Verwendung zur Erzeugung von Kupfer Copper (I) perfluorocarboxylate complexes and their use for the production of copper
12/14/2006DE102005026224A1 Integrated circuit (IC) packaging technique involves using environmental benign thermal plastic material which is injected into packaging mold cavity for packaging and molding IC chip on chip mount using heat and pressure
12/14/2006DE102005025543A1 Gehäuse für ein elektronisches Bauteil und Verfahren zur Herstellung desselben The same housing for an electronic component and methods for making
12/14/2006DE102005025465A1 Semiconductor unit comprises a circuit carrier with interior contact areas, a semiconductor chip with an active surface and flipside and bonding wire connections between chip contact areas and interior contact areas of the circuit carrier
12/14/2006DE102005024943A1 Silicon-on-insulator-insulated gate bipolar transistor, has insulation structure designed between body sections that are electrically insulated from each other, where current is generated in operating state, and structure has hollow space
12/14/2006DE102005016751B3 Verfahren zur Herstellung gehäuster elektronischer Bauelemente Process for the preparation of packaged electronic components
12/14/2006DE102004010614B4 Basishalbleiterbauteil für einen Halbleiterbeuteilstapel und Verfahren zur Herstellung desselben Based semiconductor device for a Halbleiterbeuteilstapel and method of manufacturing the same
12/14/2006DE10143997B4 Verfahren zur Herstellung einer integrierten Halbleiterschaltung mit einem Isolationsgraben A process for producing a semiconductor integrated circuit having an isolation trench
12/14/2006DE10142483B4 Elektronisches Bauteil mit Außenflachleitern und ein Verfahren zu seiner Herstellung An electronic part having external leads and a process for its preparation
12/14/2006DE10124047B4 Verfahren zur Herstellung elektronischer Bauteile mit Halbleiterchips und Systemträger A process for producing electronic components with semiconductor chips and leadframe
12/14/2006DE10110203B4 Elektronisches Bauteil mit gestapelten Halbleiterchips und Verfahren zu seiner Herstellung An electronic part having stacked semiconductor chips and process for its preparation
12/14/2006DE10101825B4 Verfahren zur Herstellung eines Halbleiter-Bauelements mit einer T-förmigen Kontaktelektrode A process for producing a semiconductor device having a T-shaped contact electrode
12/14/2006CA2611304A1 Method for making electronic devices
12/14/2006CA2611184A1 A patterning process
12/13/2006EP1732145A2 Method for manufacturing nitride-based semiconductor device
12/13/2006EP1732138A2 Method for making planar contacts to semiconductor components with decreased deformation, corresponding device and apparatus for making the same
12/13/2006EP1732133A2 Semiconductor device and method for fabricating the same
12/13/2006EP1732127A2 Method for bonding and device manufactured according to such method
12/13/2006EP1732126A1 Method for bonding and device manufactured according to such method
12/13/2006EP1732125A2 Method for forming a semiconductor memory device with buried contacts
12/13/2006EP1732124A2 Method for forming word lines in a semiconductor memory device
12/13/2006EP1732123A2 Method of fabricating a metal-semiconductor contact in semiconductor devices
12/13/2006EP1732122A2 Process of making a device having at least an element made of germanium and device therefor
12/13/2006EP1732121A1 Process for manufacturing a high-quality SOI wafer
12/13/2006EP1732120A1 Probe apparatus, wafer inspecting apparatus provided with the probe apparatus and wafer inspecting method
12/13/2006EP1732119A2 Realisation of two superposed elements inside an integrated electronic circuit
12/13/2006EP1732118A1 Heater, reflow apparatus, and solder bump forming method and apparatus
12/13/2006EP1732117A2 Semiconductor device packaging substrate and semiconductor device packaging structure
12/13/2006EP1732116A2 Methods for bonding and micro-electronic devices produced according to such methods
12/13/2006EP1732115A1 Tft sheet and method for manufacturing same
12/13/2006EP1732114A2 Silicon wafer for IGBT and method for producing same
12/13/2006EP1732113A2 Silver metallization by damascene method
12/13/2006EP1732112A1 Method for manufacturing semiconductor device
12/13/2006EP1732111A1 Susceptor
12/13/2006EP1732110A2 Compound semiconductor substrate, epitaxial substrate, processes for producing compound semiconductor substrate and epitaxial substrate
12/13/2006EP1732109A2 Mask formation over an integrated electronic circuit
12/13/2006EP1732108A1 Coater/developer and coating/developing method
12/13/2006EP1732107A1 Method for correcting electron beam exposure data
12/13/2006EP1732106A1 A component supplying device and method