Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
05/2007
05/29/2007US7224423 Double-sided LCD device comprising circuit boards and tape carrier packages
05/29/2007US7224334 Organic light emitting display device and method of fabricating the same
05/29/2007US7224224 Thin film semiconductor device and manufacturing method
05/29/2007US7224221 Power amplification apparatus, and mobile communication terminal apparatus
05/29/2007US7224186 Semiconductor circuit device
05/29/2007US7224176 Semiconductor device having test element groups
05/29/2007US7224157 Time limit function utilization apparatus
05/29/2007US7224118 Display device and electronic apparatus having a wiring connected to a counter electrode via an opening portion in an insulating layer that surrounds a pixel electrode
05/29/2007US7224115 Display apparatus and method of manufacturing the same
05/29/2007US7224074 Active area bonding compatible high current structures
05/29/2007US7224071 System and method to increase die stand-off height
05/29/2007US7224070 Plurality of semiconductor die in an assembly
05/29/2007US7224068 Stable metal structure with tungsten plug
05/29/2007US7224066 Bonding material and circuit device using the same
05/29/2007US7224065 Contact/via force fill techniques and resulting structures
05/29/2007US7224064 Semiconductor device having conductive interconnections and porous and nonporous insulating portions
05/29/2007US7224063 Dual-damascene metallization interconnection
05/29/2007US7224060 Integrated circuit with protective moat
05/29/2007US7224059 Method and apparatus for thermo-electric cooling
05/29/2007US7224058 Integrated circuit package employing a heat-spreader member
05/29/2007US7224057 Thermal enhance package with universal heat spreader
05/29/2007US7224056 Back-face and edge interconnects for lidded package
05/29/2007US7224055 Center pad type IC chip with jumpers, method of processing the same and multi chip package
05/29/2007US7224051 Semiconductor component having plate and stacked dice
05/29/2007US7224049 Method of fabricating lead frame and method of fabricating semiconductor device using the same, and lead frame and semiconductor device using the same
05/29/2007US7224046 Multilayer wiring board incorporating carbon fibers and glass fibers
05/29/2007US7224045 Leadless type semiconductor package, and production process for manufacturing such leadless type semiconductor package
05/29/2007US7224040 Multi-level thin film capacitor on a ceramic substrate
05/29/2007US7224038 Semiconductor device having element isolation trench and method of fabricating the same
05/29/2007US7224037 Semiconductor integrated circuit device with high and low breakdown-voltage MISFETs
05/29/2007US7224034 Method for manufacturing semiconductor integrated circuit device
05/29/2007US7224032 Electronic device, display device and production method thereof
05/29/2007US7224031 Semiconductor wafer and manufacturing method thereof
05/29/2007US7224029 Method and structure to create multiple device widths in FinFET technology in both bulk and SOI
05/29/2007US7224028 Semiconductor device that includes a gate insulating layer with three different thicknesses
05/29/2007US7224027 High voltage power MOSFET having a voltage sustaining region that includes doped columns formed by trench etching and diffusion from regions of oppositely doped polysilicon
05/29/2007US7224026 Nanoelectronic devices and circuits
05/29/2007US7224024 Single transistor vertical memory gain cell
05/29/2007US7224023 Semiconductor device and method of manufacturing thereof
05/29/2007US7224022 Vertical type semiconductor device and method of manufacturing the same
05/29/2007US7224019 Semiconductor device and method of manufacture thereof
05/29/2007US7224018 Semiconductor memory device with bit line of small resistance and manufacturing method thereof
05/29/2007US7224017 Device with integrated capacitance structure
05/29/2007US7224016 Memory with memory cells that include a MIM type capacitor with a lower electrode made for reduced resistance at an interface with a metal film
05/29/2007US7224015 Method for making a stack of capacitors, in particular for dynamic random access memory [DRAM]
05/29/2007US7224014 Semiconductor device and method for fabricating the same
05/29/2007US7224013 Junction diode comprising varying semiconductor compositions
05/29/2007US7224012 Thin film capacitor and fabrication method thereof
05/29/2007US7224008 Self-aligned production method for an insulated gate semiconductor device cell and insulated gate semiconductor device cell
05/29/2007US7224005 Heterojunction bipolar transistor structure
05/29/2007US7224004 Compound semiconductor device and method of fabricating the same
05/29/2007US7224002 Silicon on insulator read-write non-volatile memory comprising lateral thyristor and trapping layer
05/29/2007US7224000 Light emitting diode component
05/29/2007US7223996 Electric device, matrix device, electro-optical display device, and semiconductor memory having thin-film transistors
05/29/2007US7223995 Logic components comprising organic field effect transistors
05/29/2007US7223994 Strained Si on multiple materials for bulk or SOI substrates
05/29/2007US7223992 Thermal conducting trench in a semiconductor structure
05/29/2007US7223984 Helium ion generation method and apparatus
05/29/2007US7223976 Charged particle beam apparatus
05/29/2007US7223975 Inspection apparatus for circuit pattern
05/29/2007US7223945 Substrate heating method, substrate heating system, and applying developing system
05/29/2007US7223938 Method for manufacturing a display device including irradiating overlapping regions
05/29/2007US7223847 Preparing apoferritin/cobalt protein complex for use in biosensors and bioelectronics
05/29/2007US7223846 Urocortin proteins and uses thereof
05/29/2007US7223802 From photopolymerizable polysilane
05/29/2007US7223721 N-(hydroxyalkyl)alkoxyalkanamide; and a swelling agent, especially a hydroxylamine salt; does not attack underlying layers and does not leave residues
05/29/2007US7223707 Dynamic rapid vapor deposition process for conformal silica laminates
05/29/2007US7223706 Method for forming plasma enhanced deposited, fully oxidized PSG film
05/29/2007US7223705 Ambient gas treatment of porous dielectric
05/29/2007US7223704 Repair of carbon depletion in low-k dielectric films
05/29/2007US7223703 Method of forming patterns
05/29/2007US7223702 Method of and apparatus for performing sequential processes requiring different amounts of time in the manufacturing of semiconductor devices
05/29/2007US7223701 In-situ sequential high density plasma deposition and etch processing for gap fill
05/29/2007US7223700 Method for fabricating fine features by jet-printing and surface treatment
05/29/2007US7223699 Plasma etch reactor and method
05/29/2007US7223698 Method of forming a semiconductor arrangement with reduced field-to active step height
05/29/2007US7223697 Chemical mechanical polishing method
05/29/2007US7223696 Methods for maskless lithography
05/29/2007US7223695 Methods to deposit metal alloy barrier layers
05/29/2007US7223694 Method for improving selectivity of electroless metal deposition
05/29/2007US7223693 Methods for fabricating memory devices using sacrificial layers and memory devices fabricated by same
05/29/2007US7223692 Multi-level semiconductor device with capping layer for improved adhesion
05/29/2007US7223691 Method of forming low resistance and reliable via in inter-level dielectric interconnect
05/29/2007US7223690 Substrate processing method
05/29/2007US7223689 Methods for forming a metal contact in a semiconductor device in which an ohmic layer is formed while forming a barrier metal layer
05/29/2007US7223688 Single level metal memory cell using chalcogenide cladding
05/29/2007US7223687 Printed wiring board and method of fabricating the same
05/29/2007US7223686 Semiconductor interconnection line and method of forming the same
05/29/2007US7223685 Damascene fabrication with electrochemical layer removal
05/29/2007US7223684 Dual damascene wiring and method
05/29/2007US7223683 Wafer level bumping process
05/29/2007US7223682 Method of making a semiconductor device using bump material including a liquid
05/29/2007US7223681 Interconnection pattern design
05/29/2007US7223680 Method of forming a dual damascene metal trace with reduced RF impedance resulting from the skin effect
05/29/2007US7223679 Transistor gate electrode having conductor material layer
05/29/2007US7223678 Circuit and method for a folded bit line memory cell with vertical transistor and trench capacitor
05/29/2007US7223677 Process for fabricating a semiconductor device having an insulating layer formed over a semiconductor substrate
05/29/2007US7223676 Very low temperature CVD process with independently variable conformality, stress and composition of the CVD layer
05/29/2007US7223675 Method of forming pre-metal dielectric layer
05/29/2007US7223674 Methods for forming backside alignment markers useable in semiconductor lithography