Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
07/2007
07/12/2007WO2006063098A8 Lift-off patterning processes employing energetically-stimulated local removal of solid-condensed-gas layers
07/12/2007WO2006055605A3 Method and substances for diagnosing bipolar disorder
07/12/2007WO2006055459A3 Tensile and compressive stressed materials for semiconductors
07/12/2007WO2006053180A3 Methods for fabricating one or more metal damascene structures in a semiconductor wafer
07/12/2007WO2005078168A3 Method of crystallizing silicon, apparatus therefore, thin film transistor and display apparatus
07/12/2007WO2005047726A3 Wafer container and door with vibration dampening latching mechanism
07/12/2007US20070162889 Method and apparatus for providing optical proximity features to a reticle pattern for deep sub-wavelength optical lithography
07/12/2007US20070162885 Semiconductor device layout method, a computer program, and a semiconductor device manufacture method
07/12/2007US20070162884 Basic cell, edge cell, wiring shape, wiring method, and shield wiring structure
07/12/2007US20070162801 Wireless radio frequency technique design and method for testing of integrated circuits and wafers
07/12/2007US20070162242 System and method for estimating reliability of components for testing and quality optimization
07/12/2007US20070162175 Semiconductor wafer processing tape winding body, semiconductor wafer processing tape sticking apparatus and semiconductor wafer processing apparatus that use the semiconductor wafer processing tape winding body
07/12/2007US20070162172 Process monitoring device for sample processing apparatus and control method of sample processing apparatus
07/12/2007US20070161494 Non-oxide ceramic having oxide layer on the surface thereof, method for production thereof and use thereof
07/12/2007US20070161338 Wafer polishing apparatus and wafer polishing method
07/12/2007US20070161333 In-situ chemical-mechanical planarization pad metrology using ultrasonic imaging
07/12/2007US20070161285 Electrically-conductive-contact holder, electrically-conductive-contact unit, and method for manufacturing electrically-conductive-contact holder
07/12/2007US20070161261 Methods for fabricating carbon nano-tube powders and field emission display devices
07/12/2007US20070161260 Methods of forming a phosphorus doped silicon dioxide-comprising layer
07/12/2007US20070161259 Two Dimensional Nanostructure Fabrication Method and Two Dimensional Nanostructure Fabricated Therefrom
07/12/2007US20070161258 Method of fabricating a semiconductor device having a hydrogen source layer
07/12/2007US20070161257 Method for forming porous insulation film
07/12/2007US20070161256 SiCOH film preparation using precursors with built-in porogen functionality
07/12/2007US20070161255 Method for etching with hardmask
07/12/2007US20070161254 Method of forming a passivation layer of a semiconductor device
07/12/2007US20070161253 Method of fabricating a trench isolation layer in a semiconductor device
07/12/2007US20070161252 Method of manufacturing flash memory and flash memory manufactured from the method
07/12/2007US20070161251 Pitch reduced patterns relative to photolithography features
07/12/2007US20070161250 Method for electrochemically mechanically polishing a conductive material on a substrate
07/12/2007US20070161249 Method for manufacturing semiconductor device
07/12/2007US20070161248 Process for removing material from substrates
07/12/2007US20070161247 Etching method of single wafer
07/12/2007US20070161246 Process For Selectively Removing Dielectric Material in the Presence of Metal Silicide
07/12/2007US20070161245 Use of dual mask processing of different composition such as inorganic/organic to enable a single poly etch using a two-print-two-etch approach
07/12/2007US20070161244 Method and apparatus for post silicide spacer removal
07/12/2007US20070161243 Aqueous solution for removing post-etch residue
07/12/2007US20070161242 Semiconductor device having copper wiring
07/12/2007US20070161241 Method for fabricating a thin film and metal line of semiconductor device
07/12/2007US20070161240 Air break for improved silicide formation with composite caps
07/12/2007US20070161239 Structure for optimizing fill in semiconductor features deposited by electroplating
07/12/2007US20070161238 Method of microminiaturizing a nano-structure
07/12/2007US20070161237 Nanoscopic wired-based devices and arrays
07/12/2007US20070161236 Semiconductor device and process for producing the same
07/12/2007US20070161235 Back-to-front via process
07/12/2007US20070161234 Methods of Forming Back Side Layers for Thinned Wafers and Related Structures
07/12/2007US20070161233 Semiconductor Device and Method of Manufacturing the Same
07/12/2007US20070161232 Method for forming metal interconnection in semicondutor damascene process
07/12/2007US20070161231 Method for forming metal wiring in a semiconductor device
07/12/2007US20070161230 UV curing of low-k porous dielectrics
07/12/2007US20070161229 Dual plasma treatment barrier film to reduce low-k damage
07/12/2007US20070161228 Wiring substrate and semiconductor device, and method of manufacturing wiring substrate
07/12/2007US20070161227 Self-encapsulated silver alloys for interconnects
07/12/2007US20070161226 Dual damascene process flow enabling minimal ULK film modification and enhanced stack integrity
07/12/2007US20070161225 Method for reducing leakage currents caused by misalignment of a contact structure by increasing an error tolerance of the contact patterning process
07/12/2007US20070161224 Semiconductor module and method of forming a semiconductor module
07/12/2007US20070161223 Conductive structures for electrically conductive pads of circuit board and fabrication method thereof
07/12/2007US20070161222 Method of forming pad of semiconductor device
07/12/2007US20070161221 Method for manufacturing semiconductor device
07/12/2007US20070161220 Semiconductor device with mushroom electrode and manufacture method thereof
07/12/2007US20070161219 Method of producing a semiconductor element and semiconductor element
07/12/2007US20070161218 Semiconductor device and method of manufacturing the same
07/12/2007US20070161217 Process for manufacturing a large-scale integration MOS device and corresponding MOS device
07/12/2007US20070161216 Epitaxial deposition of doped semiconductor materials
07/12/2007US20070161215 External storage and data recovery method for external storage as well as program
07/12/2007US20070161214 High k gate stack on III-V compound semiconductors
07/12/2007US20070161213 Semiconductor device and method of manufacturing the same
07/12/2007US20070161212 Method for manufacturing mosfet on semiconductor device
07/12/2007US20070161211 Method for manufacturing semiconductor device
07/12/2007US20070161210 Method for wafer level packaging and fabricating cap structures
07/12/2007US20070161209 Method for producing a strong bond between two layers of a multilayer system, and multilayer system
07/12/2007US20070161208 Semiconductor device and fabrication method thereof
07/12/2007US20070161207 Method for Manufacturing Semiconductor Device
07/12/2007US20070161206 Isolation structure for strained channel transistors
07/12/2007US20070161205 Electrical device and method for fabricating the same
07/12/2007US20070161204 Methods for metal ARC layer formation
07/12/2007US20070161203 Method with high gapfill capability and resulting device structure
07/12/2007US20070161202 Methods of forming a plurality of capacitors
07/12/2007US20070161201 Liquid spraying method, liquid spraying system and liquid spraying execute program
07/12/2007US20070161200 Method for fabricating capacitor in semiconductor device
07/12/2007US20070161199 Method for manufacturing soi wafer
07/12/2007US20070161198 Transistors With Gate Stacks Having Metal Electrodes
07/12/2007US20070161197 Method of manufacturing semiconductor device
07/12/2007US20070161196 Methods for preserving strained semiconductor substrate layers during CMOS processing
07/12/2007US20070161195 Structure and method for a sidewall SONOS memory device
07/12/2007US20070161194 Method of measuring an effective channel length and an overlap length in a metal-oxide semiconductor field effect transistor
07/12/2007US20070161193 Systems and methods for a high density, compact memory array
07/12/2007US20070161192 Method of fabricating non-volatile memory structure
07/12/2007US20070161191 Scalable Self-Aligned Dual Floating Gate Memory Cell Array And Methods Of Forming The Array
07/12/2007US20070161190 Split-gate-type nonvolatile memory device and method of fabricating the same
07/12/2007US20070161189 Method of fabricating the floating gate of flash memory device
07/12/2007US20070161188 Method of manufacturing nonvolatile semiconductor memory device
07/12/2007US20070161187 Method of manufacturing flash memory device
07/12/2007US20070161186 Programmable Resistive RAM and Manufacturing Method
07/12/2007US20070161185 Method of manufacturing charge storage device
07/12/2007US20070161184 Liquid crystal display array board and method of fabricating the same
07/12/2007US20070161183 Method for fabricating semiconductor device
07/12/2007US20070161182 Method for fabricating storage node contact hole of semiconductor device
07/12/2007US20070161181 Capacitorless DRAM with cylindrical auxiliary gate and fabrication method thereof
07/12/2007US20070161180 Automatic layer deposition process
07/12/2007US20070161179 Semiconductor device and method for making the same