Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
07/2007
07/10/2007US7242012 Lithography device for semiconductor circuit pattern generator
07/10/2007US7241991 Region-of-interest based electron beam metrology
07/10/2007US7241967 Method and apparatus for cutting electrical wiring line on a substrate, and method and apparatus for manufacturing electronic device
07/10/2007US7241966 Wafer level package fabrication method using laser illumination
07/10/2007US7241725 comprising imine compounds and hydrazine compounds; for polishing tantalum-containing barrier; abrasive free
07/10/2007US7241707 Layered films formed by controlled phase segregation
07/10/2007US7241706 Low k ILD layer with a hydrophilic portion
07/10/2007US7241705 Methods of forming conductive contacts to source/drain regions and methods of forming local interconnects
07/10/2007US7241704 forming precursor film on substrate, film comprising a porogen and a structure former, wherein the structure former has one or more carbon-carbon double or triple bonds and porogen has at least one bulky organic functional group and porogen precursor is a polyfunctional cyclic non-aromatic compound
07/10/2007US7241703 Film forming method for semiconductor device
07/10/2007US7241702 Processing method for annealing and doping a semiconductor
07/10/2007US7241701 Method and furnace for the vapor phase deposition of components onto semiconductor substrates with a variable main flow direction of the process gas
07/10/2007US7241700 Methods for post offset spacer clean for improved selective epitaxy silicon growth
07/10/2007US7241699 Wide bandgap semiconductor device construction
07/10/2007US7241698 Method for sensor edge and mask height control for narrow track width devices
07/10/2007US7241697 Method for sensor edge control and track width definition for narrow track width devices
07/10/2007US7241696 Method for depositing a metal layer on a semiconductor interconnect structure having a capping layer
07/10/2007US7241695 Semiconductor device having nano-pillars and method therefor
07/10/2007US7241694 Method for manufacturing semiconductor device having trench in silicon carbide semiconductor substrate
07/10/2007US7241693 Processing method for protection of backside of a wafer
07/10/2007US7241692 Method and structure for aluminum chemical mechanical polishing and protective layer
07/10/2007US7241691 Conducting metal oxide with additive as p-MOS device electrode
07/10/2007US7241690 Method for conditioning a microelectronics device deposition chamber
07/10/2007US7241689 Microprobe tips and methods for making
07/10/2007US7241688 Aperture masks for circuit fabrication
07/10/2007US7241686 Atomic layer deposition of tantalum-containing materials using the tantalum precursor TAIMATA
07/10/2007US7241685 Semiconductor device and method of manufacturing the same
07/10/2007US7241684 Method of forming metal wiring of semiconductor device
07/10/2007US7241683 Stabilized photoresist structure for etching process
07/10/2007US7241682 Method of forming a dual damascene structure
07/10/2007US7241681 Bilayered metal hardmasks for use in dual damascene etch schemes
07/10/2007US7241680 Electronic packaging using conductive interposer connector
07/10/2007US7241679 Method of manufacturing semiconductor device
07/10/2007US7241678 Integrated die bumping process
07/10/2007US7241677 Process for producing integrated circuits including reduction using gaseous organic compounds
07/10/2007US7241676 Semiconductor device and method for manufacturing the same
07/10/2007US7241675 Attachment of integrated circuit structures and other substrates to substrates with vias
07/10/2007US7241674 Method of forming silicided gate structure
07/10/2007US7241673 Methods of forming silicon-doped aluminum oxide, and methods of forming transistors and memory devices
07/10/2007US7241672 Method and apparatus for rapid cooldown of annealed wafer
07/10/2007US7241671 CMOS image sensor and method for fabricating the same
07/10/2007US7241670 Method to form relaxed SiGe layer with high Ge content using co-implantation of silicon with boron or helium and hydrogen
07/10/2007US7241669 Method of forming a scribe line on a passive electronic component substrate
07/10/2007US7241668 Planar magnetic tunnel junction substrate having recessed alignment marks
07/10/2007US7241667 Method of separating layers of material
07/10/2007US7241666 Method for manufacturing semiconductor device
07/10/2007US7241665 Shallow trench isolation
07/10/2007US7241664 Alignment mark forming method, substrate in which devices are formed, and liquid discharging head using substrate
07/10/2007US7241663 Maskless multiple sheet polysilicon resistor
07/10/2007US7241662 Reduction of field edge thinning in peripheral devices
07/10/2007US7241661 Method of forming a coupling dielectric Ta2O5 in a memory device
07/10/2007US7241660 Manufacturing method of semiconductor device
07/10/2007US7241659 Volatile memory devices and methods for forming same
07/10/2007US7241658 Vertical gain cell
07/10/2007US7241657 Integrated semiconductor storage with at least a storage cell and procedure
07/10/2007US7241656 Semiconductor device and its manufacture method, and measurement fixture for the semiconductor device
07/10/2007US7241655 Method of fabricating a vertical wrap-around-gate field-effect-transistor for high density, low voltage logic and memory array
07/10/2007US7241654 Vertical NROM NAND flash memory array
07/10/2007US7241653 Nonplanar device with stress incorporation layer and method of fabrication
07/10/2007US7241652 Method for fabricating organic thin film transistor
07/10/2007US7241651 Semiconductor device manufacturing method
07/10/2007US7241650 Method of manufacturing a polysilicon layer and a mask used therein
07/10/2007US7241649 FinFET body contact structure
07/10/2007US7241648 Array substrates for use in liquid crystal displays and fabrication methods thereof
07/10/2007US7241647 Graded semiconductor layer
07/10/2007US7241646 Semiconductor device having voltage output function trim circuitry and method for same
07/10/2007US7241645 Method for assembling a ball grid array package with multiple interposers
07/10/2007US7241644 Adhesive, method of connecting wiring terminals and wiring structure
07/10/2007US7241643 Wafer level chip scale package
07/10/2007US7241642 Mounting and dicing process for wafers
07/10/2007US7241641 Attachment of integrated circuit structures and other substrates to substrates with vias
07/10/2007US7241640 Solder ball assembly for a semiconductor device and method of fabricating same
07/10/2007US7241639 Color filter, manufacturing method thereof, electrooptical device and electronic equipment
07/10/2007US7241638 Micromechanical device and method of manufacture thereof
07/10/2007US7241637 Method of producing LED bodies with the aid of a cross-sectional constriction
07/10/2007US7241636 Method and apparatus for providing structural support for interconnect pad while allowing signal conductance
07/10/2007US7241635 Binning for semi-custom ASICs
07/10/2007US7241634 Semiconductor device and method for producing the same
07/10/2007US7241633 Heat treatment apparatus and heat treatment method
07/10/2007US7241632 MTJ read head with sidewall spacers
07/10/2007US7241631 MTJ elements with high spin polarization layers configured for spin-transfer switching and spintronics devices using the magnetic elements
07/10/2007US7241554 Photoresist, can suppress contamination of a mirror tower, has high etching resistance, can solve the problems in edge roughness, and can be adapted to developer solutions having various alkali concentrations
07/10/2007US7241553 Polymer, resist composition, and patterning process
07/10/2007US7241552 Chemical resistance; bonding strength; accuracte patterns; photolithography
07/10/2007US7241539 Photomasks including shadowing elements therein and related methods and systems
07/10/2007US7241490 Enhanced adhesion between the intermediate layer and the film by including in the intermediate layer Mo, Cr, Ni, and/or Si dispersed to a depth of 20 nm or less from the surface; and a copper or copper alloy conductive layer formed on the intermediate layer
07/10/2007US7241428 Highly efficient compact capacitance coupled plasma reactor/generator and method
07/10/2007US7241419 Circuits for the control of output current in an electronic device for performing active biological operations
07/10/2007US7241414 Method and apparatus for molding a semiconductor device
07/10/2007US7241397 Honeycomb optical window deposition shield and method for a plasma processing system
07/10/2007US7241394 Process of fabricating polymer sustained microelectrodes
07/10/2007US7241372 rotating substrate holding member to remove plating liquid; and sucking liquid remaining on the substrate-contacting portion or in its vicinity, while the holding member is rotated
07/10/2007US7241368 Forming mixed oxide of hafnium, silicon; dielectrics
07/10/2007US7241362 Substrate treatment method and substrate treatment apparatus
07/10/2007US7241360 Method and apparatus for neutralization of ion beam using AC ion source
07/10/2007US7241346 Apparatus for vapor deposition
07/10/2007US7241345 Cylinder for thermal processing chamber
07/10/2007US7241343 Liquid droplet ejecting apparatus, electro-optical device, method of manufacturing the electro-optical device, and electronic apparatus
07/10/2007US7241342 Non-dripping nozzle apparatus
07/10/2007US7241205 Method of processing a substrate
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