Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
05/2008
05/22/2008WO2008059857A1 Thin-film photoelectric conversion device
05/22/2008WO2008059831A1 Method for supplying treatment gas, treatment gas supply system, and system for treating object
05/22/2008WO2008059827A1 Plasma doping method
05/22/2008WO2008059815A1 Rotation introducing mechanism, substrate transfer device, and vacuum treating apparatus
05/22/2008WO2008059808A1 Photosensitive resin composition, insulating film, protective film, and electronic equipment
05/22/2008WO2008059799A1 Processing system, processing method and recording medium
05/22/2008WO2008059768A1 Semiconductor device
05/22/2008WO2008059767A1 Optical device inspecting apparatus
05/22/2008WO2008059686A1 Substrate processing method and substrate processing system
05/22/2008WO2008059684A1 Substrate carrying equipment
05/22/2008WO2008059679A1 Compound, acid generator, resist composition, and resist pattern formation method
05/22/2008WO2008059638A1 Semiconductor device
05/22/2008WO2008059633A1 Semiconductor element, method for fabricating the same and display
05/22/2008WO2008059457A1 Removable compartments for workpiece stocker
05/22/2008WO2008059456A1 Workpiece stocker with circular configuration
05/22/2008WO2008059350A2 Semiconductor device and method for production thereof
05/22/2008WO2008059301A1 An electronic component and method for its production
05/22/2008WO2008059227A1 Workpiece carrier and workpiece carrier loading/unloading system and method
05/22/2008WO2008059049A1 Method and arrangement for heat treatment of substrates
05/22/2008WO2008058903A1 Vertical dram device, having a trench capacitor and a vertical transistor, and manufacturing method
05/22/2008WO2008058851A2 Method for setting up an automatic machine for mounting semiconductor chips
05/22/2008WO2008058829A1 Method for producing a semiconductor component with two trenches
05/22/2008WO2008058474A1 Conductor polymer composite carrier with isoproperty conductive columns
05/22/2008WO2008058458A1 Multiplestep cmp method
05/22/2008WO2008058397A1 Systems and methods for supporting a workpiece during heat-treating
05/22/2008WO2008039280A3 Real time process monitoring and control for semicontor layers
05/22/2008WO2008035819A3 Electronic component mounting structure
05/22/2008WO2008028027A3 Adhesive dispensing for semiconductor packaging
05/22/2008WO2008024161A3 Integrated circuity, electromagnetic radiation interaction components, transistor devices and semiconductor constructions; and methoda of forming these
05/22/2008WO2007130790A3 Process condition measuring device with shielding
05/22/2008WO2007094849A3 Antireflective coating material
05/22/2008US20080120587 Integrated circuit design system, integrated circuit design program, and integrated circuit design method
05/22/2008US20080120059 Test apparatus and test method
05/22/2008US20080119956 Personalized hardware
05/22/2008US20080119060 Inspection systems and methods
05/22/2008US20080119059 Low thermal budget chemical vapor deposition processing
05/22/2008US20080119058 Method of improving initiation layer for low-k dielectric film by digital liquid flow meter
05/22/2008US20080119057 Method of clustering sequential processing for a gate stack structure
05/22/2008US20080119056 Solution for wet etching copper film included within a ball limiting metallurgy of a semiconductor device, comprising ammonium persulfate etching agent, potassium sulfate passivation agent for protecting lead tin solder material, and pH modifier for controlling etch rate of copper
05/22/2008US20080119055 Reducing twisting in ultra-high aspect ratio dielectric etch
05/22/2008US20080119054 Method of manufacturing semiconductor device
05/22/2008US20080119053 Method of manufacturing sidewall spacers on a memory device, and device comprising same
05/22/2008US20080119052 Selective barrier metal polishing method
05/22/2008US20080119051 Method For Selective CMP Of Polysilicon
05/22/2008US20080119050 Semiconductor device manufacture method
05/22/2008US20080119049 Plasma etching method and apparatus
05/22/2008US20080119048 Lithography masks and methods of manufacture thereof
05/22/2008US20080119047 Schemes for forming barrier layers for copper in interconnect structures
05/22/2008US20080119046 Method of making a contact on a backside of a die
05/22/2008US20080119045 Method for manufacturing semiconductor device
05/22/2008US20080119044 Systems and methods for back end of line processing of semiconductor circuits
05/22/2008US20080119043 Vias having varying diameters and fills for use with a semiconductor device and methods of forming semiconductor device structures including same
05/22/2008US20080119042 Systems and methods for back end of line processing of semiconductor circuits
05/22/2008US20080119041 Method for fabricating closed vias in a printed circuit board
05/22/2008US20080119040 Method for forming a dual damascene structure
05/22/2008US20080119039 Memory Card with Connecting Portions for Connection to an Adapter
05/22/2008US20080119038 Use of palladium in ic manufacturing with conductive polymer bump
05/22/2008US20080119037 Method for manufacturing semiconductor device
05/22/2008US20080119036 Wire and solder bond forming methods
05/22/2008US20080119035 Wire and solder bond forming methods
05/22/2008US20080119034 Method of formation of coherent wavy nanostructures (variants)
05/22/2008US20080119033 Method of integrating metal-containing films into semiconductor devices
05/22/2008US20080119032 Etching method and structure using a hard mask for strained silicon mos transistors
05/22/2008US20080119031 Stress enhanced mos transistor and methods for its fabrication
05/22/2008US20080119030 Method for manufacturing thin film semiconductor device
05/22/2008US20080119029 Wafer scale thin film package
05/22/2008US20080119028 SOQ substrate and method of manufacturing SOQ substrate
05/22/2008US20080119027 Vertically stacked field programmable nonvolatile memory and method of fabrication
05/22/2008US20080119026 Multi-State Non-Volatile Integrated Circuit Memory Systems that Employ Dielectric Storage Elements
05/22/2008US20080119025 Method of making a strained semiconductor device
05/22/2008US20080119024 Method of manufacturing a semiconductor device
05/22/2008US20080119023 Manufacturing method for semiconductor device to mitigate short channel effects
05/22/2008US20080119022 Method of making eeprom transistors
05/22/2008US20080119021 Semiconductor device and method of manufacturing the same
05/22/2008US20080119020 Methods of forming a field effect transistors, pluralities of field effect transistors, and DRAM circuitry comprising a plurality of individual memory cells
05/22/2008US20080119019 Semiconductor devices having pFET with SiGe gate electrode and embedded SiGe source/drain regions and methods of making the same
05/22/2008US20080119018 Image display unit and method for manufacturing the same
05/22/2008US20080119017 Method for manufacturing thin film transistor using differential photo-resist developing
05/22/2008US20080119016 Methods for fabricating three-dimensional carbon nanotube FET integrated circuits including selective deposition of carbon nanotubes onto catalysts on conductive layer at bottom of openings in dielectric layer; scalable to commercial production
05/22/2008US20080119015 Method of packaging a semiconductor device and a prefabricated connector
05/22/2008US20080119014 Method and apparatus for reducing stresses applied to bonded interconnects between substrates
05/22/2008US20080119013 Method of packaging a device using a dielectric layer
05/22/2008US20080119012 Mold array process for chip encapsulation and substrate strip utilized
05/22/2008US20080119006 Method for manufacturing image sensor
05/22/2008US20080119004 Method of packaging a device having a keypad switch point
05/22/2008US20080119003 Substrate contact for a MEMS device
05/22/2008US20080119002 Substrate contact for a MEMS device
05/22/2008US20080119001 Substrate contact for a mems device
05/22/2008US20080119000 Monolithic IC and MEMS microfabrication process
05/22/2008US20080118998 Method for enhancing lightness of p-type nitride group compound L.E.D.
05/22/2008US20080118997 Vacuum Holder For Integrated Circuit Units
05/22/2008US20080118996 Thin film transistor array substrate and method of producing the same
05/22/2008US20080118995 Method and composition for restoring dielectric properties of porous dielectric materials
05/22/2008US20080118994 Residue isolation process in TFT LCD fabrication
05/22/2008US20080118993 Method of manufacturing magnetic random access memory (MRAM)
05/22/2008US20080118777 Chemical vapor deposition with a dialkyl metal and NO alone or with an oxidizer; NO decomposition and atomic nitrogen incorporation into the formed transparent metal conducting oxide; without co-doping, plasma enhancement or the use of high temperature
05/22/2008US20080118769 Dopant doping while growing the thin film at a first temperature; interrupting the growth of the thin film and annealing the thin film at a second temperature higher than the first temperature; high temperature lowly doped layer growing step of growing the thin film at the second temperature
05/22/2008US20080118737 Composition for forming porous film, porous film and method for forming the same, interlevel insulator film, and semiconductor device
05/22/2008US20080118712 Epitaxially coated semiconductor wafer and device and method for producing an epitaxially coated semiconductor wafer
05/22/2008US20080118424 Method for Manufacturing Silicon Wafer and Silicon Wafer Manufactured by this Method