Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
03/2009
03/26/2009US20090081840 Method of Forming Field Effect Transistors Using Diluted Hydrofluoric Acid to Remove Sacrificial Nitride Spacers
03/26/2009US20090081839 High speed ge channel heterostructures for field effect devices
03/26/2009US20090081838 Semiconductor memory and fabrication method for the same
03/26/2009US20090081837 Method for fabricating a semiconductor device having an extended stress liner
03/26/2009US20090081836 Method of forming cmos with si:c source/drain by laser melting and recrystallization
03/26/2009US20090081835 Non-Volatile Memory Devices and Methods of Forming the Same
03/26/2009US20090081834 Method of applying encapsulant to wire bonds
03/26/2009US20090081833 Wire bond encapsulant application control
03/26/2009US20090081832 Method of reducing wire bond profile height in integrated circuits mounted to circuit boards
03/26/2009US20090081831 Warpage control using a package carrier assembly
03/26/2009US20090081830 Semiconductor Device and Method of Laser-Marking Wafers with Tape Applied to its Active Surface
03/26/2009US20090081829 Method of adhering wire bond loops to reduce loop height
03/26/2009US20090081828 MEMS Fabrication Method
03/26/2009US20090081827 Process for selective area deposition of inorganic materials
03/26/2009US20090081826 Process for making doped zinc oxide
03/26/2009US20090081824 Stacked organic memory devices and methods of operating and fabricating
03/26/2009US20090081822 Optical enhancement of integrated circuit photodetectors
03/26/2009US20090081819 Method and apparatus for managing manufacturing equipment, method for manufacturing device thereby
03/26/2009US20090081818 Method of wire bond encapsulation profiling
03/26/2009US20090081817 Patterning method
03/26/2009US20090081816 Light emitting device and production system of the same
03/26/2009US20090081815 Method and Apparatus for Spacer-Optimization (S-O)
03/26/2009US20090081814 Integrated manufacturing system with transistor drive current control
03/26/2009US20090081813 Method and Apparatus for Measurement and Control of Photomask to Substrate Alignment
03/26/2009US20090081812 Production method for semiconductor device
03/26/2009US20090081811 Distributed power arrangements for localizing power delivery
03/26/2009US20090081810 Substrate processing apparatus and substrate processing method
03/26/2009US20090081594 semiconductor nano-sized particle containing materials as highly refractive medium in immersion lithography, as anti-reflection coating in optics, as pellicle in lithography and as sensitizer in UV photoresists
03/26/2009US20090081593 Method for forming resist pattern and method for manufacturing a semiconductor device
03/26/2009US20090081566 Wafer having scribe lanes suitable for sawing process, reticle used in manufacturing the same, and method of manufacturing the same
03/26/2009US20090081565 Method for forming etching mask, control program and program storage medium
03/26/2009US20090081564 Exposure mask, pattern formation method, and exposure mask fabrication method
03/26/2009US20090081415 Controlled alignment of catalytically grown nanostructures in a large-scale synthesis process
03/26/2009US20090081109 GaN CRYSTAL SHEET
03/26/2009US20090081009 Substrate treatment apparatus
03/26/2009US20090081007 Transfer mechanism with multiple wafer handling capability
03/26/2009US20090081005 Substrate transfer apparatus and method for controlling down flow
03/26/2009US20090080483 Semiconductor laser device and manufacturing method thereof
03/26/2009US20090080245 Offset non-volatile storage
03/26/2009US20090080240 Method for production of mram elements
03/26/2009US20090080236 Semiconductor memory device and method for manufacturing same
03/26/2009US20090080229 Single-layer metal conductors with multiple thicknesses
03/26/2009US20090080136 Electrostatic chuck member
03/26/2009US20090080097 Novel monocrystalline silicon micromirrors for maskless lithography
03/26/2009US20090079983 Surface inspection device
03/26/2009US20090079974 Methods and systems for lithography process control
03/26/2009US20090079948 Developing method and developing apparatus
03/26/2009US20090079530 Forming a helical inductor
03/26/2009US20090079525 Electrostatic clamp, lithographic apparatus and method of manufacturing an electrostatic clamp
03/26/2009US20090079469 Semiconductor integrated circuit
03/26/2009US20090079452 Component assembly and alignment
03/26/2009US20090079449 Test Structures, Systems, and Methods for Semiconductor Devices
03/26/2009US20090079298 Multi-cantilever mems sensor, manufacturing method thereof, sound source localization apparatus using the multi-cantilever mems sensor, sound source localization method using the sound source localization apparatus
03/26/2009US20090079095 Semiconductor wafer, semiconductor chip cut from the semiconductor wafer, and method of manufacturing semiconductor wafer
03/26/2009US20090079094 Solder Bump with Inner Core Pillar in Semiconductor Package
03/26/2009US20090079093 Flip chip structure and method of manufacture
03/26/2009US20090079092 Stacked Dual-Die Packages, Methods of Making, and Systems Incorporating Said Packages
03/26/2009US20090079091 Integrated circuit packaging system with interposer
03/26/2009US20090079090 Stacked semiconductor chips
03/26/2009US20090079089 Stacked semiconductor chips
03/26/2009US20090079088 Semiconductor device with conductive die attach material
03/26/2009US20090079087 Semiconductor device and method for fabricating the same
03/26/2009US20090079084 Preventing breakage of long metal signal conductors on semiconductor substrates
03/26/2009US20090079083 Interconnect structure and fabricating method of the same
03/26/2009US20090079082 Bonding pad structure allowing wire bonding over an active area in a semiconductor die and method of manufacturing same
03/26/2009US20090079080 Semiconductor Device with Multi-Layer Metallization
03/26/2009US20090079079 Semiconductor device with an air gap between lower interconnections and a connection portion to the lower interconnections not formed adjacent to the air gap
03/26/2009US20090079078 Minimization of Interfacial Resitance Across Thermoelectric Devices by Surface Modification of the Thermoelectric Material
03/26/2009US20090079077 Interconnect structure with a via gouging feature absent profile damage to the interconnect dielectric and method of fabricating same
03/26/2009US20090079076 Patternable dielectric film structure with improved lithography and method of fabricating same
03/26/2009US20090079075 Interconnect structures with patternable low-k dielectrics and method of fabricating same
03/26/2009US20090079073 Semiconductor device having low dielectric insulating film and manufacturing method of the same
03/26/2009US20090079072 Semiconductor device having low dielectric insulating film and manufacturing method of the same
03/26/2009US20090079071 Stress relief structures for silicon interposers
03/26/2009US20090079070 Semiconductor Package with Passivation Island for Reducing Stress on Solder Bumps
03/26/2009US20090079069 Semiconductor Device and Method of Forming Interconnect Structure in Non-Active Area of Wafer
03/26/2009US20090079068 Methods for attaching a flip chip integrated circuit assembly to a substrate
03/26/2009US20090079067 Method for Stacking Semiconductor Chips
03/26/2009US20090079066 Integrated circuit packaging system with passive components
03/26/2009US20090079065 Semiconductor device including electronic component coupled to a backside of a chip
03/26/2009US20090079064 Methods of forming a thin tim coreless high density bump-less package and structures formed thereby
03/26/2009US20090079063 Microelectronic package and method of cooling an interconnect feature in same
03/26/2009US20090079060 Method and structure for dispensing chip underfill through an opening in the chip
03/26/2009US20090079059 Integrated semiconductor substrate structure using incompatible processes
03/26/2009US20090079058 Semiconductor substrate elastomeric stack
03/26/2009US20090079057 Integrated circuit device
03/26/2009US20090079055 Method and structure of expanding, upgrading, or fixing multi-chip package
03/26/2009US20090079054 Semiconductor device, structure of mounting the same, and method of removing foreign matter from the same
03/26/2009US20090079052 Semiconductor package, apparatus and method for manufacturing the semiconductor package, and electronic device equipped with the semiconductor package
03/26/2009US20090079051 Semiconductor device and manufacturing method of the same
03/26/2009US20090079050 Air cavity package for flip-chip
03/26/2009US20090079048 Integrated circuit package system with under paddle leadfingers
03/26/2009US20090079046 Semiconductor package and method for manufacturing the same
03/26/2009US20090079044 Semiconductor package and manufacturing method thereof
03/26/2009US20090079043 Semiconductor device and method of manufacturing the same
03/26/2009US20090079042 Center Conductor to Integrated Circuit for High Frequency Applications
03/26/2009US20090079041 Semiconductor Package and Method of Reducing Electromagnetic Interference Between Devices
03/26/2009US20090079040 Semiconductor structure with coincident lattice interlayer
03/26/2009US20090079039 Semiconductor device, method for manufacturing semiconductor device, and method for designing manufacturing semiconductor device
03/26/2009US20090079038 Method Of Making An Integrated Circuit Including Singulating A Semiconductor Wafer
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