Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
08/2009
08/18/2009US7575991 Removing a high-k gate dielectric
08/18/2009US7575990 Method of forming self-aligned contacts and local interconnects
08/18/2009US7575989 Method of manufacturing a transistor of a semiconductor device
08/18/2009US7575988 Method of fabricating a hybrid substrate
08/18/2009US7575987 Method of plasma doping
08/18/2009US7575986 Gate interface relaxation anneal method for wafer processing with post-implant dynamic surface annealing
08/18/2009US7575985 Method of fabricating semiconductor device
08/18/2009US7575984 Conductive hard mask to protect patterned features during trench etch
08/18/2009US7575983 Method for fabricating a device with flexible substrate and method for stripping flexible-substrate
08/18/2009US7575982 Stacked-substrate processes for production of nitride semiconductor structures
08/18/2009US7575981 Method for fabricating isolation layer in semiconductor device
08/18/2009US7575980 Semiconductor device and method for manufacturing the same
08/18/2009US7575979 Method to form a film
08/18/2009US7575978 Method for making conductive nanoparticle charge storage element
08/18/2009US7575977 Self-aligned LDMOS fabrication method integrated deep-sub-micron VLSI process, using a self-aligned lithography etches and implant process
08/18/2009US7575976 Localized spacer for a multi-gate transistor
08/18/2009US7575975 Method for forming a planar and vertical semiconductor structure having a strained semiconductor layer
08/18/2009US7575974 Method for fabricating semiconductor device including recess gate
08/18/2009US7575973 Method of making three dimensional NAND memory
08/18/2009US7575972 Method of manufacturing nonvolatile memory device
08/18/2009US7575971 Semiconductor device having a capacitor with a stepped cylindrical structure and method of manufacturing the same
08/18/2009US7575970 Deep trench capacitor through SOI substrate and methods of forming
08/18/2009US7575969 Buried layer and method
08/18/2009US7575968 Inverse slope isolation and dual surface orientation integration
08/18/2009US7575966 Method for fabricating pixel structure of active matrix organic light-emitting diode
08/18/2009US7575965 Method for forming large area display wiring by droplet discharge, and method for manufacturing electronic device and semiconductor device
08/18/2009US7575964 Semiconductor device employing buried insulating layer and method of fabricating the same
08/18/2009US7575963 Method for manufacturing contact structures of wiring
08/18/2009US7575962 Fin structure and method of manufacturing fin transistor adopting the fin structure
08/18/2009US7575961 Electrooptical device and a method of manufacturing the same
08/18/2009US7575960 Method for fabricating a thin film transistor matrix device
08/18/2009US7575959 Manufacturing method of semiconductor device
08/18/2009US7575958 Programmable fuse with silicon germanium
08/18/2009US7575957 Leadless semiconductor package and method for manufacturing the same
08/18/2009US7575956 Fabrication method for semiconductor package heat spreaders
08/18/2009US7575955 Method for making electronic packages
08/18/2009US7575954 Ceramic substrate and method of breaking same
08/18/2009US7575953 Stacked die with a recess in a die BGA package
08/18/2009US7575950 Semiconductor device and a method of manufacturing the same
08/18/2009US7575948 Method for operating photosensitive device
08/18/2009US7575947 Method for enhancing growth of semi-polar (Al,In,Ga,B)N via metalorganic chemical vapor deposition
08/18/2009US7575946 Method for making compound semiconductor and method for making semiconductor device
08/18/2009US7575945 Method of forming a metal line and method of manufacturing a display substrate by using the same including etching and undercutting the channel layer
08/18/2009US7575944 Method of manufacturing nitride-based semiconductor light emitting diode
08/18/2009US7575943 Quantum dot laser diode and method of manufacturing the same
08/18/2009US7575942 Epitaxial substrate, semiconductor element, manufacturing method for epitaxial substrate and method for unevenly distributing dislocations in group III nitride crystal
08/18/2009US7575941 Method of manufacturing photodiode
08/18/2009US7575940 Dielectric film, method of manufacturing the same, and semiconductor capacitor having the dielectric film
08/18/2009US7575855 Etching photomasks, photoresists; photolithography; depth of focus
08/18/2009US7575835 Exposure method, exposure quantity calculating system using the exposure method and semiconductor device manufacturing method using the exposure method
08/18/2009US7575834 Which prevents sticking of particles; semiconductors
08/18/2009US7575693 Chemical mechanical polishing; dielectrics
08/18/2009US7575664 Plating method
08/18/2009US7575638 Apparatus for defining regions of process exclusion and process performance in a process chamber
08/18/2009US7575636 Substrate processing apparatus and substrate processing method
08/18/2009US7575634 Coating device and coating film forming method
08/18/2009US7575503 Vacuum-assisted pad conditioning system
08/18/2009US7575494 Fabricating method for organic electro luminescence display device having a rib barrier of reverse taper shape and organic electro luminescence display device
08/18/2009US7575406 Substrate processing apparatus
08/18/2009US7575382 Coating/developing apparatus and operation method thereof
08/18/2009US7575370 Heat treatment apparatus and method of calibrating the apparatus
08/18/2009US7575173 Smart card, smart card module, and a method for production of a smart card module
08/18/2009US7575147 Compliant wirebond pedestal
08/18/2009US7574974 Device for production of a plasma sheet
08/18/2009US7574838 Profiled rail and method for producing a profiled rail
08/18/2009US7574784 Bare die tray clip
08/13/2009WO2009100409A2 Apparatus for substantially uniform fluid flow rates relative to a proximity head in processing of a wafer surface by a meniscus
08/13/2009WO2009100289A2 Methods and apparatus for changing area ratio in a plasma processing system
08/13/2009WO2009100288A2 Electrode orientation and parallelism adjustment mechanism for plasma processing systems
08/13/2009WO2009100286A2 A floating collar clamping device for auto-aligning nut and screw in linear motion leadscrew and nut assembly
08/13/2009WO2009100083A2 System and methods for conservation of exhaust heat energy
08/13/2009WO2009100054A1 Integrated circuit having memory cells including gate material having high work function, and method of manufacturing the same
08/13/2009WO2009100053A2 Pattern formation employing self-assembled material
08/13/2009WO2009100015A2 Engineering flat surfaces on materials doped via pulsed laser irradiation
08/13/2009WO2009099983A1 Dispenser for a coating apparatus having reduced sag
08/13/2009WO2009099922A2 An apparatus for handling a substrate and a method thereof
08/13/2009WO2009099812A2 Reducing damage to low-k materials during photoresist stripping
08/13/2009WO2009099791A1 Methods of reducing cd loss in a microelectromechanical device
08/13/2009WO2009099776A1 Closed loop mocvd deposition control
08/13/2009WO2009099775A2 Modified sputtering target and deposition components, methods of production and uses thereof
08/13/2009WO2009099769A2 Double mask self-aligned double patterning technology (sadpt) process
08/13/2009WO2009099756A1 Novel method for conformal plasma immersed ion implantation assisted by atomic layer deposition
08/13/2009WO2009099732A1 Memory cells, methods of forming memory cells, and methods of forming programmed memory cells
08/13/2009WO2009099721A2 Processing system for fabricating compound nitride semiconductor devices
08/13/2009WO2009099720A1 Cvd apparatus
08/13/2009WO2009099713A2 Elimination of photoresist material collapse and poisoning in 45-nm feature size using dry or immersion lithography
08/13/2009WO2009099707A1 Printed electronics
08/13/2009WO2009099699A2 Shielded integrated circuit pad structure
08/13/2009WO2009099693A1 High bandwidth cache-to-processing unit communication in a multiple processor/cache system
08/13/2009WO2009099661A2 A protective coating for a plasma processing chamber part and a method of use
08/13/2009WO2009099660A2 Adjustable gap capacitively coupled rf plasma reactor including lateral bellows and non-contact particle seal
08/13/2009WO2009099626A1 Multiple memory cells and method
08/13/2009WO2009099521A1 Plasma immersion ion implantation using an electrode with edge-effect suppression by a downwardly curving edge
08/13/2009WO2009099519A1 Plasma immersion implantation method using a pure or nearly pure silicon seasoning layer on the chamber interior surfaces
08/13/2009WO2009099417A1 Stencils with removable backings for forming micron-sized features on surfaces and methods of making and using the same
08/13/2009WO2009099294A2 Method of recycling chemical
08/13/2009WO2009099284A2 Substrate supporting unit, substrate processing apparatus, and method of manufacturing substrate supporting unit
08/13/2009WO2009099255A2 Chip supply pallet and chip supply apparatus
08/13/2009WO2009099254A1 Method for insulating film formation, storage medium from which information is readable with computer, and treatment system
08/13/2009WO2009099252A1 Method for modifying insulating film with plasma
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