| Patents for G11C 8 - Arrangements for selecting an address in a digital store (19,368) |
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| 08/05/2008 | US7408835 Optically readable molecular memory obtained using carbon nanotubes, and method for storing information in said molecular memory |
| 08/05/2008 | US7408834 Flash controller cache architecture |
| 08/05/2008 | US7408833 Simulating a floating wordline condition in a memory device, and related techniques |
| 08/05/2008 | US7408832 Memory control method and apparatuses |
| 07/31/2008 | US20080181048 Semiconductor memory device and memory cell accessing method thereof |
| 07/31/2008 | US20080181047 Semiconductor device |
| 07/31/2008 | US20080181046 Clock circuitry for ddr-sdram memory controller |
| 07/31/2008 | US20080181045 Calibration circuit of a semiconductor memory device and method of operating the same |
| 07/31/2008 | US20080181044 Bus structure, memory chip and integrated circuit |
| 07/31/2008 | US20080181043 Configurable device ID in non-volatile memory |
| 07/31/2008 | US20080181042 Method and System for Efficiently Organizing Data in Memory |
| 07/31/2008 | US20080181041 Semiconductor memory device and refresh control method |
| 07/31/2008 | US20080181040 N-port memory circuits allowing M memory addresses to be accessed concurrently and signal processing methods thereof |
| 07/31/2008 | US20080181037 Multi-port semiconductor memory device |
| 07/31/2008 | US20080181031 Data strobe synchronization circuit and method for double data rate, multi-bit writes |
| 07/31/2008 | US20080181027 Memory device, memory controller and memory system |
| 07/31/2008 | US20080180994 Memory system, semiconductor memory device and method of driving same |
| 07/31/2008 | US20080180981 Resistance semiconductor memory device having three-dimensional stack and word line decoding method thereof |
| 07/31/2008 | US20080180133 Expandable decoding circuit and decoding method |
| 07/31/2008 | US20080179728 Laminated memory |
| 07/30/2008 | EP1949381A2 Pseudo-dual port memory where ratio of first to second memory access is clock duty cycle independent |
| 07/29/2008 | US7406646 Multi-strobe apparatus, testing apparatus, and adjusting method |
| 07/29/2008 | US7405996 System and method to synchronize signals in individual integrated circuit components |
| 07/29/2008 | US7405995 Semiconductor storage device |
| 07/29/2008 | US7405994 Dual port cell structure |
| 07/29/2008 | US7405993 Control component for controlling a semiconductor memory component in a semiconductor memory module |
| 07/29/2008 | US7405992 Method and apparatus for communicating command and address signals |
| 07/29/2008 | US7405990 Method and apparatus for in-system redundant array repair on integrated circuits |
| 07/29/2008 | US7405958 Magnetic memory device having XP cell and Str cell in one chip |
| 07/29/2008 | CA2347765C Column redundancy circuit with reduced signal path delay |
| 07/24/2008 | WO2008045856A3 Concurrent reading of status registers |
| 07/24/2008 | WO2007139648A3 Method for improving the precision of a temperature-sensor circuit |
| 07/24/2008 | US20080175091 Synchronous memory circuit |
| 07/24/2008 | US20080175090 Memory device and method having programmable address configurations |
| 07/24/2008 | US20080175089 Flash memory card |
| 07/24/2008 | US20080175083 Memory cell access circuit |
| 07/24/2008 | US20080175081 Semiconductor memory device and operation control method thereof |
| 07/24/2008 | US20080175071 Methods of Operating Memory Systems Including Memory Devices Set to Different Operating Modes |
| 07/23/2008 | EP1947651A2 Semiconductor memory |
| 07/23/2008 | CN101226767A Read-write control circuit, method and apparatus for two-port RAM |
| 07/22/2008 | US7404068 Single operation per-bit memory access |
| 07/22/2008 | US7403447 Method for stabilizing electronic circuit operation and electronic apparatus using the same |
| 07/22/2008 | US7403446 Single late-write for standard synchronous SRAMs |
| 07/22/2008 | US7403445 Configuration of memory device |
| 07/22/2008 | US7403444 Selectable memory word line deactivation |
| 07/22/2008 | US7403443 Layout for distributed sense amplifier driver in memory device |
| 07/22/2008 | US7403442 Pulse controlled word line driver |
| 07/22/2008 | US7403413 Multiple port resistive memory cell |
| 07/22/2008 | US7403412 Integrated circuit chip with improved array stability |
| 07/22/2008 | US7403408 Semiconductor memory device and semiconductor device |
| 07/17/2008 | WO2007136812A3 Memory array having row redundancy and method |
| 07/17/2008 | US20080170461 Semiconductor memory apparatus, semiconductor integrated circuit having the same, and method of outputting data in semiconductor memory apparatus |
| 07/17/2008 | US20080170460 Multi-path accessible semiconductor memory device having mailbox areas and mailbox access control method thereof |
| 07/17/2008 | US20080170433 Word line drivers in non-volatile memory device and method having a shared power bank and processor-based systems using same |
| 07/16/2008 | EP1943650A1 Memory array arranged in banks and sectorsand associated decoders |
| 07/16/2008 | CN100403446C Multiport scanning chain register device and method |
| 07/16/2008 | CN100403443C Method and apparatus for analyzing and repairing memory |
| 07/15/2008 | US7401177 Data storage device, data storage control apparatus, data storage control method, and data storage control program |
| 07/15/2008 | US7400564 Disc with temporary disc definition structure (TDDS) and temporary defect list (TDFL), and method of and apparatus for managing defect in the same |
| 07/15/2008 | US7400550 Delay mechanism for unbalanced read/write paths in domino SRAM arrays |
| 07/15/2008 | US7400549 Memory block reallocation in a flash memory device |
| 07/15/2008 | US7400548 Method for providing multiple reads/writes using a 2read/2write register file array |
| 07/15/2008 | US7400543 Metal programmable self-timed memories |
| 07/10/2008 | US20080165611 Synchronous semiconductor memory device |
| 07/10/2008 | US20080165610 Semiconductor memory device capable of synchronous/asynchronous operation and data input/output method thereof |
| 07/10/2008 | US20080165609 Repairing integrated circuit memory arrays |
| 07/10/2008 | US20080165606 Semiconductor memory device for reducing peak current during refresh operation |
| 07/10/2008 | US20080165602 Processor Instruction Cache with Dual-Read Modes |
| 07/10/2008 | US20080165600 Repairing Advanced-Memory Buffer (AMB) with Redundant Memory Buffer for Repairing DRAM on a Fully-Buffered Memory-Module |
| 07/10/2008 | US20080165596 Semiconductor memory device and method thereof |
| 07/10/2008 | US20080165591 Semiconductor memory device and method for driving the same |
| 07/10/2008 | US20080165575 Memory cell array biasing method and a semiconductor memory device |
| 07/10/2008 | US20080165566 Non-volatile memory including sub cell array and method of writing data thereto |
| 07/10/2008 | US20080165563 Semiconductor memory device |
| 07/09/2008 | CN100401427C Nonvolatile semiconductor memory device |
| 07/09/2008 | CN100401422C Circuit of accessing cross point diode memory array, memory module and accessing method |
| 07/09/2008 | CN100401371C Image memory architecture for achieving high speed access |
| 07/08/2008 | US7398078 Method and apparatus for security in a wireless network |
| 07/08/2008 | US7397727 Write burst stop function in low power DDR sDRAM |
| 07/08/2008 | US7397726 Flexible RAM clock enable |
| 07/08/2008 | US7397725 Single-clock, strobeless signaling system |
| 07/08/2008 | US7397724 Word line decoder suitable for low operating voltage of flash memory device |
| 07/08/2008 | US7397715 Semiconductor memory device for testing redundancy cells |
| 07/08/2008 | US7397713 Flash EEprom system |
| 07/08/2008 | US7397710 Internal voltage level control circuit and semiconductor memory device as well as method of controlling the same |
| 07/08/2008 | US7397707 Compressed event counting technique and application to a flash memory system |
| 07/03/2008 | WO2008077244A1 Independent link and bank selection |
| 07/03/2008 | WO2008077243A1 A power up detection system for a memory device |
| 07/03/2008 | WO2008077240A1 Mask programmable anti-fuse architecture |
| 07/03/2008 | US20080162853 Memory systems having a plurality of memories and memory access methods thereof |
| 07/03/2008 | US20080162798 Wear leveling techniques for flash eeprom systems |
| 07/03/2008 | US20080159060 Sequential memory and accessing method thereof |
| 07/03/2008 | US20080159059 Progressive memory initialization with waitpoints |
| 07/03/2008 | US20080159058 Write latency tracking using a delay lock loop in a synchronous dram |
| 07/03/2008 | US20080159057 Column address enable signal generation circuit for semiconductor memory device |
| 07/03/2008 | US20080159056 Internal address generation circuit and internal address generation method |
| 07/03/2008 | US20080159055 Method and circuit for driving word line of memory cell |
| 07/03/2008 | US20080159054 Word line driving method of semiconductor memory device |
| 07/03/2008 | US20080159053 Reversible polarity decoder circuit |
| 07/03/2008 | US20080159052 Method for using a reversible polarity decoder circuit |